Microchip Technology DV164136 Fiche De Données
2007-2012 Microchip Technology Inc.
DS39778E-page 175
PIC18F87J11 FAMILY
12.1.4
PMP MULTIPLEXING OPTIONS
(80-PIN DEVICES)
(80-PIN DEVICES)
By default, the PMP and the External Memory Bus
multiplex some of their signals to the same I/O pins on
PORTD and PORTE. It is possible that some applica-
tions may require the PMP signals to be located
elsewhere. For these instances, the 80-pin devices can
be configured to multiplex the PMP to different I/O
ports. PMP configuration is determined by the PMPMX
Configuration bit setting; by default, the PMP and EMB
modules share PORTD and PORTE. The optional pin
configuration is shown in
multiplex some of their signals to the same I/O pins on
PORTD and PORTE. It is possible that some applica-
tions may require the PMP signals to be located
elsewhere. For these instances, the 80-pin devices can
be configured to multiplex the PMP to different I/O
ports. PMP configuration is determined by the PMPMX
Configuration bit setting; by default, the PMP and EMB
modules share PORTD and PORTE. The optional pin
configuration is shown in
.
TABLE 12-1:
PMP PIN MULTIPLEXING FOR
80-PIN DEVICES
80-PIN DEVICES
12.2
Slave Port Modes
The primary mode of operation for the module is con-
figured using the MODE<1:0> bits in the PMMODEH
register. The setting affects whether the module acts as
a slave or a master and it determines the usage of the
control pins.
figured using the MODE<1:0> bits in the PMMODEH
register. The setting affects whether the module acts as
a slave or a master and it determines the usage of the
control pins.
12.2.1
LEGACY MODE (PSP)
In Legacy mode (PMMODEH<1:0> = 00 and
PMPEN = 1), the module is configured as a Parallel
Slave Port with the associated enabled module pins
dedicated to the module. In this mode, an external
device, such as another microcontroller or micropro-
cessor, can asynchronously read and write data using
the 8-bit data bus (PMD<7:0>), the read (PMRD), write
(PMWR) and chip select (PMCS1) inputs. It acts as a
slave on the bus and responds to the read/write control
signals.
PMPEN = 1), the module is configured as a Parallel
Slave Port with the associated enabled module pins
dedicated to the module. In this mode, an external
device, such as another microcontroller or micropro-
cessor, can asynchronously read and write data using
the 8-bit data bus (PMD<7:0>), the read (PMRD), write
(PMWR) and chip select (PMCS1) inputs. It acts as a
slave on the bus and responds to the read/write control
signals.
Port. When chip select is active and a write strobe
occurs (PMCS = 1 and PMWR = 1), the data from
PMD<7:0> is captured into the PMDIN1L register.
occurs (PMCS = 1 and PMWR = 1), the data from
PMD<7:0> is captured into the PMDIN1L register.
FIGURE 12-2:
LEGACY PARALLEL SLAVE PORT EXAMPLE
PMP Function
Pin Assignment
PMPMX = 1
PMPMX
= 0
PMD0
PORTD<0>
PORTF<7>
PMD1
PORTD<1>
PORTF<6>
PMD2
PORTD<2>
PORTF<5>
PMD3
PORTD<3>
PORTH<4>
PMD4
PORTD<4>
PORTA<5>
PMD5
PORTD<5>
PORTA<4>
PMD6
PORTD<6>
PORTH<3>
PMD7
PORTD<7>
PORTH<2>
PMBE
PORTE<2>
PORTH<5>
PMWR
PORTE<1>
PORTH<7>
PMRD
PORTE<0>
PORTH<6>
PMD<7:0>
PMRD
PMWR
Master
Address Bus
Data Bus
Control Lines
Data Bus
Control Lines
PMCS
PMD<7:0>
PMRD
PMWR
PIC18 Slave
PMCS1