Microchip Technology MA240017 Fiche De Données
2008-2
011 M
ic
rochip
T
e
chnology
In
c.
DS39927C
-page 35
PIC24F16KA102 FAMILY
TABLE 4-6:
TIMER REGISTER MAP
File Name
Addr
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
All
Resets
TMR1
0100
Timer1 Register
0000
PR1
0102
Timer1 Period Register
FFFF
T1CON
0104
TON
—
TSIDL
—
—
—
—
—
—
TGATE
TCKPS1
TCKPS0
—
TSYNC
TCS
—
0000
TMR2
0106
Timer2 Register
0000
TMR3HLD
0108
Timer3 Holding Register (for 32-bit timer operations only)
0000
TMR3
010A
Timer3 Register
0000
PR2
010C
Timer2 Period Register
FFFF
PR3
010E
Timer3 Period Register
FFFF
T2CON
0110
TON
—
TSIDL
—
—
—
—
—
—
TGATE
TCKPS1
TCKPS0
T32
—
TCS
—
0000
T3CON
0112
TON
—
TSIDL
—
—
—
—
—
—
TGATE
TCKPS1
TCKPS0
—
—
TCS
—
0000
Legend:
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
TABLE 4-7:
INPUT CAPTURE REGISTER MAP
File
Name
Addr
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
All
Resets
IC1BUF
0140
Input Capture 1 Register
FFFF
IC1CON
0142
—
—
ICSIDL
—
—
—
—
—
ICTMR
ICI1
ICI0
ICOV
ICBNE
ICM2
ICM1
ICM0
0000
Legend:
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
TABLE 4-8:
OUTPUT COMPARE REGISTER MAP
File
Name
Addr
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
All
Resets
OC1RS
0180
Output Compare 1 Secondary Register
FFFF
OC1R
0182
Output Compare 1 Register
FFFF
OC1CON
0184
—
—
OCSIDL
—
—
—
—
—
—
—
—
OCFLT
OCTSEL
OCM2
OCM1
OCM0
0000
Legend:
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.