Microchip Technology 25LC320A-I/MS Memory IC MSOP-8 25LC320A-I/MS Fiche De Données
Codes de produits
25LC320A-I/MS
© 2009 Microchip Technology Inc.
DS21828F-page 9
25AA320A/25LC320A
2.4
Write Enable (WREN) and Write
Disable (WRDI)
Disable (WRDI)
The 25XX320A contains a write enable latch. See
Table 2-4 for the write-protect functionality matrix. This
latch must be set before any write operation will be
completed internally. The WREN instruction will set the
latch, and the WRDI will reset the latch.
Table 2-4 for the write-protect functionality matrix. This
latch must be set before any write operation will be
completed internally. The WREN instruction will set the
latch, and the WRDI will reset the latch.
The following is a list of conditions under which the
write enable latch will be reset:
write enable latch will be reset:
• Power-up
• WRDI instruction successfully executed
• WRSR instruction successfully executed
• WRITE instruction successfully executed
FIGURE 2-4:
WRITE ENABLE SEQUENCE (WREN)
FIGURE 2-5:
WRITE DISABLE SEQUENCE (WRDI)
SCK
0
2
3
4
5
6
7
1
SI
High-Impedance
SO
CS
0
1
0
0
0
0
0
1
SCK
0
2
3
4
5
6
7
1
SI
High-Impedance
SO
CS
0
1
0
0
0
0
0
10