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Microchip Technology MA330024 Fiche De Données

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dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
DS70000591F-page 232
 2009-2014 Microchip Technology Inc.
FIGURE 16-1:
HIGH-SPEED PWMx MODULE ARCHITECTURAL DIAGRAM
CPU
Master Time Base
PWM
Generator 1
PWM
Generator 2
PWM
Generator 9
SYNCIx
SYNCOx
PWM1H
PWM1L
PWM1 Interrupt
PWM2H
PWM2L
PWM2 Interrupt
PWM8H
PWM8L
PWM8 Interrupt
PWM9H
PWM9L
PWM9 Interrupt
Synchronization Signal
Data Bus
ADC Module
Fault and
Fault, Current-Limit
Synchronization Signal
Synchronization Signal
Synchronization Signal
Primary Trigger
Secondary Trigger
Special Event Trigger
Current-Limit
and Dead-Time Compensation
Fault, Current-Limit
Fault, Current-Limit
and Dead-Time Compensation
PWM3 through PWM7
Primary and Secondary
and Dead-Time Compensation
PWM
Generator 8