Texas Instruments Hercules TMS570LS04x/03x LaunchPad Evaluation Kit LAUNCHXL-TMS57004 LAUNCHXL-TMS57004 Fiche De Données
Codes de produits
LAUNCHXL-TMS57004
SPNS186A – OCTOBER 2012 – REVISED SEPTEMBER 2013
1
TMS570LS0432/0332 16- and 32-Bit RISC Flash
4.8
Device Memory Map
................................
Microcontroller
..........................................
4.9
Flash Memory
......................................
1.1
Features
.............................................
4.10
Flash Program and Erase Timings for Program
Flash
Flash
................................................
1.2
Applications
..........................................
4.11
Flash Program and Erase Timings for Data Flash
.
1.3
Description
...........................................
4.12
Tightly-Coupled RAM Interface Module
............
1.4
Functional Block Diagram
...........................
4.13
Parity Protection for Accesses to peripheral RAMs
Revision History
..............................................
4.14
On-Chip SRAM Initialization and Testing
...........
2
Device Package and Terminal Functions
..........
4.15
Vectored Interrupt Manager
........................
2.1
PZ QFP Package Pinout (100-Pin)
..................
4.16
Real Time Interrupt Module
........................
2.2
Terminal Functions
...................................
4.17
Error Signaling Module
.............................
2.3
Output Multiplexing and Control
....................
4.18
Reset / Abort / Error Sources
......................
2.4
Special Multiplexed Options
........................
4.19
Digital Windowed Watchdog
.......................
3
Device Operating Conditions
.......................
3.1
Absolute Maximum Ratings Over Operating Free-
4.20
Debug Subsystem
..................................
Air Temperature Range,
............................
5
Peripheral Information and Electrical
3.2
Device Recommended Operating Conditions
......
Specifications
..........................................
3.3
Switching Characteristics over Recommended
5.1
Peripheral Legend
..................................
Operating Conditions for Clock Domains
..........
5.2
Multi-Buffered 12-bit Analog-to-Digital Converter
..
3.4
Wait States Required
...............................
5.3
General-Purpose Input/Output
.....................
3.5
Power Consumption Over Recommended
5.4
Enhanced High-End Timer (N2HET)
...............
Operating Conditions
...............................
5.5
Controller Area Network (DCAN)
...................
3.6
Input/Output Electrical Characteristics Over
5.6
Local Interconnect Network Interface (LIN)
........
Recommended Operating Conditions
..............
5.7
Multi-Buffered / Standard Serial Peripheral Interface
3.7
Output Buffer Drive Strengths
......................
......................................................
3.8
Input Timings
.......................................
5.8
Enhanced Quadrature Encoder (eQEP)
............
3.9
Output Timings
.....................................
6
Device and Documentation Support
...............
4
System Information and Electrical Specifications
6.1
Device and Development-Support Tool
.............................................................
Nomenclature
.......................................
4.1
Voltage Monitor Characteristics
....................
6.2
Device Identification
................................
4.2
Power Sequencing and Power On Reset
..........
6.3
Community Resources
.............................
4.3
Warm Reset (nRST)
................................
6.4
Module Certifications
...............................
4.4
ARM
©
Cortex-R4™ CPU Information
..............
7
Mechanical Data
......................................
4.5
Clocks
..............................................
7.1
Thermal Data
......................................
4.6
Clock Monitoring
....................................
7.2
Packaging Information
............................
4.7
Glitch Filters
........................................
6
Contents
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