Analog Devices AD9233 Evaluation Board AD9233-80EBZ AD9233-80EBZ Fiche De Données

 

Rev. A | Page 28 of 44 

The AD9233 evaluation board provides all of the support 
circuitry required to operate the ADC in its various modes and 
configurations. The converter can be driven differentially 
through a double balun configuration (default) or through the 

 differential driver. The ADC can also be driven in a 

single-ended fashion. Separate power pins are provided to 
isolate the DUT from the 

 drive circuitry. Each input 

configuration can be selected by proper connection of various 
components. Figure 59 shows the typical bench characterization 
setup used to evaluate the ac performance of the AD9233.  

It is critical that the signal sources used for the analog input and 
clock have very low phase noise (<1 ps rms jitter) to realize the 
optimum performance of the converter. Proper filtering of the 
analog input signal to remove harmonics and lower the inte-
grated or broadband noise at the input is also necessary to achieve 
the specified noise performance.  

See Figure 60 to Figure 70 for the complete schematics and 
layout diagrams that demonstrate the routing and grounding 
techniques that should be applied at the system level.  

This evaluation board comes with a wall-mountable switching 
power supply that provides a 6 V, 2 A maximum output. Simply 
connect the supply to the rated 100 V ac to 240 V ac wall outlet 
at 47 Hz to 63 Hz. The other end is a 2.1 mm inner diameter 
jack that connects to the PCB at P500. Once on the PC board, 
the 6 V supply is fused and conditioned before connecting to 
five low dropout linear regulators that supply the proper bias to 
each of the various sections on the board. When operating the 
evaluation board in a nondefault condition, L501, L503, L504, 
L508, and L509 can be removed to disconnect the switching 
power supply. This enables the user to bias each section of the 
board independently. Use P501 to connect a different supply for 
each section.  

Although at least one 1.8 V supply is needed with a 1 A current 
capability for AVDD_DUT and DRVDD_DUT, it is recom-
mended that separate supplies be used for analog and digital. 

To operate the evaluation board using the 

 option, a 

separate 5.0 V analog supply is needed. The 5.0 V supply, or 
AMP_VDD, should have a 1 A current capability. To operate 
the evaluation board using the alternate SPI options, a separate 
3.3 V analog supply is needed in addition to the other supplies. 
The 3.3 V supply (AVDD_3.3V) should have a 1 A current 
capability as well. Solder Jumpers J501, J502, and J505 allow the 
user to combine these supplies. See Figure 64 for more details. 

When connecting the clock and analog source, use clean signal 
generators with low phase noise, such as Rohde & Schwarz SMHU 
or Agilent HP8644 signal generators or the equivalent. Use one 
meter long, shielded, RG-58, 50 Ω coaxial cables for making 
connections to the evaluation board. Enter the desired frequency 
and amplitude for the ADC. Typically, most ADI evaluation 
boards can accept a ~2.8 V p-p or 13 dBm sine wave input for 
the clock. When connecting the analog input source, it is 
recommended to use a multipole, narrow-band, band-pass  
filter with 50 Ω terminations. Analog Devices uses TTE®, Allen 
Avionics, and K&L® types of band-pass filters. Connect the filter 
directly to the evaluation board, if possible.  

The parallel CMOS outputs interface directly with Analog 
Devices’ standard single-channel FIFO data capture board 
(HSC-ADC-EVALB-SC). For more information on the FIFO 
boards and their optional settings, visit 

 

 

0

54

92-

084