Analog Devices ADP2114 Evaluation Board ADP2114-EVALZ ADP2114-EVALZ Fiche De Données
Codes de produits
ADP2114-EVALZ
EVAL-ADP2114
Rev. 0 | Page 3 of 20
USING THE EVALUATION (DEMO) BOARD
POWERING UP
The ADP2114 evaluation board is supplied fully assembled and
tested. Before applying power to the evaluation board, follow
the procedures in this section.
tested. Before applying power to the evaluation board, follow
the procedures in this section.
Input Power Source
The power source voltage must not exceed 5.5 V, the maximum
operation input voltage of the
operation input voltage of the
Connect the negative terminal of the power source to the J2
(GND) jack of the evaluation board and the positive terminal of
the power source to the J1 (VIN+) jack of the evaluation board.
(GND) jack of the evaluation board and the positive terminal of
the power source to the J1 (VIN+) jack of the evaluation board.
Output Load
Before connecting a load to the output of the demo board, make
sure that the output voltage does not exceed the maximum operat-
ing voltage range of the load. To connect a load to the output of
Channel 1, connect the negative terminal of the load to Jack J4
(GND1) on the evaluation board and connect the positive ter-
minal of the load to Jack J3 (+VOUT1). To connect a load to the
output of Channel 2, connect the negative terminal of the load
to Jack J5 (GND2) of the evaluation board and connect the
positive terminal to Jack J6 (+VOUT2).
For the single interleaved output configuration, the outputs of
Channel 1 and Channel 2 are shorted together by soldering
Link CB3. To apply a load to the single interleaved dual-phase
output, connect the negative terminal of the load to either
Jack J4 (GND1) or Jack J5 (GND2) of the evaluation board
and connect the positive terminal of the load to either Jack J3
(+VOUT1) or Jack J6 (+VOUT2).
sure that the output voltage does not exceed the maximum operat-
ing voltage range of the load. To connect a load to the output of
Channel 1, connect the negative terminal of the load to Jack J4
(GND1) on the evaluation board and connect the positive ter-
minal of the load to Jack J3 (+VOUT1). To connect a load to the
output of Channel 2, connect the negative terminal of the load
to Jack J5 (GND2) of the evaluation board and connect the
positive terminal to Jack J6 (+VOUT2).
For the single interleaved output configuration, the outputs of
Channel 1 and Channel 2 are shorted together by soldering
Link CB3. To apply a load to the single interleaved dual-phase
output, connect the negative terminal of the load to either
Jack J4 (GND1) or Jack J5 (GND2) of the evaluation board
and connect the positive terminal of the load to either Jack J3
(+VOUT1) or Jack J6 (+VOUT2).
Enabling and Disabling the DC-to-DC Converter
HEADER3 EN1 is used to control Channel 1. Use one of the
following methods to enable or disable Channel 1:
• To enable Channel 1, short the middle pin of HEADER3
following methods to enable or disable Channel 1:
• To enable Channel 1, short the middle pin of HEADER3
EN1 to VIN+ by placing a shunt in the on position, or
apply a dc voltage from 2.0 V to 5.5 V to the middle pin.
apply a dc voltage from 2.0 V to 5.5 V to the middle pin.
• To disable Channel 1, short the middle pin of HEADER3
EN1 to GND by placing a shunt in the off position or apply
a positive dc voltage below 0.8 V to the middle pin.
a positive dc voltage below 0.8 V to the middle pin.
HEADER3 EN2 is used to control Channel 2. Use one of the
following methods to enable or disable Channel 2:
• To enable Channel 2, short the middle pin of HEADER3
following methods to enable or disable Channel 2:
• To enable Channel 2, short the middle pin of HEADER3
EN2 to VIN+ by placing a shunt in the on position, or
apply a dc voltage from 2.0 V to 5.5 V to the middle pin.
apply a dc voltage from 2.0 V to 5.5 V to the middle pin.
• To disable Channel 2, short the middle pin of HEADER3
EN2 to GND by placing a shunt in the off position, or
apply a positive dc voltage below 0.8 V to the middle pin.
apply a positive dc voltage below 0.8 V to the middle pin.
For the single interleaved output configuration, the EN1 and
EN2 signals are connected together at the Circuit Breaker CB1,
which is a solder link. Use either HEADER3 EN1 or EN2 to
enable and disable Channel 1 and Channel 2 simultaneously.
EN2 signals are connected together at the Circuit Breaker CB1,
which is a solder link. Use either HEADER3 EN1 or EN2 to
enable and disable Channel 1 and Channel 2 simultaneously.
Input and Output Voltages
To measure the input voltage, V
IN
, connect the negative probe of
the voltmeter to Terminal T2 (GND) on the evaluation board
and connect the positive probe to Terminal T1 (VIN+).
To measure the output voltage of Channel 1, V
and connect the positive probe to Terminal T1 (VIN+).
To measure the output voltage of Channel 1, V
OUT1
, connect
the negative probe of the voltmeter to Terminal T4 (GND1)
and connect the positive probe to Terminal T3. To measure the
output voltage of Channel 2, V
and connect the positive probe to Terminal T3. To measure the
output voltage of Channel 2, V
OUT2
, connect the negative probe
to Terminal T5 (GND2) and connect the positive probe to
Terminal T6.
To measure the output voltage, V
Terminal T6.
To measure the output voltage, V
OUT
, for the single interleaved
output configuration, connect the negative probe of the voltmeter
to Terminal T7 (GND) and connect the positive probe to either
Terminal T3 or Terminal T6.
to Terminal T7 (GND) and connect the positive probe to either
Terminal T3 or Terminal T6.
External Synchronization
To synchronize the dc-to-dc converter to an external clock
signal,
1. Short the middle pin of HEADER3 SCFG to GND by
signal,
1. Short the middle pin of HEADER3 SCFG to GND by
placing a shunt in the in position. This configures the
(SYNC/CLKOUT) pin of the ADP2114 as an input.
(SYNC/CLKOUT) pin of the ADP2114 as an input.
2. Apply an external clock signal to Test Point TP1
SYNC/CLKOUT. The clock signal must have a logic high
level from 2.0 V up to the voltage of the input power, V
level from 2.0 V up to the voltage of the input power, V
IN
,
and a logic low level below 0.8 V. Set the external clock
pulse width to more than 100 ns and the frequency, f
pulse width to more than 100 ns and the frequency, f
SYNC
,
equal to double the target PWM switching frequency, f
SW
:
f
SYNC
= 2 × f
SW
(1)
For reliable synchronization, the external clock frequency,
f
f
SYNC
, must be in the range from 800 kHz to 2 MHz for the
ADP2114-EVALZ board, which has the switching frequency
set to 600 kHz. When using the ADP2114-2PH-EVALZ
board, which has the switching frequency set point at
1.2 MHz, the external clock frequency f
set to 600 kHz. When using the ADP2114-2PH-EVALZ
board, which has the switching frequency set point at
1.2 MHz, the external clock frequency f
SYNC
must be within
the range from 1.6 MHz to 4 MHz.
Internal Clock Out
Shorting the middle pin of HEADER3 SCFG to VIN+, performed
by placing the shunt in the out position, makes the ADP2114
internal clock available at Test Point TP1 (SYNC/CLKOUT).
The frequency of the internal clock, f
by placing the shunt in the out position, makes the ADP2114
internal clock available at Test Point TP1 (SYNC/CLKOUT).
The frequency of the internal clock, f
CLKOUT
, is twice that of the
switching frequency, f
SW
, of the converter and 90° phase-shifted.
PGOOD1 and PGOOD2 Signals
When Channel 1 is enabled and the output voltage, V
OUT1
, is in
regulation range, the logic signal at the Test Point PGOOD1 is
high. When Channel 2 is enabled and the output voltage, V
high. When Channel 2 is enabled and the output voltage, V
OUT2
,
is in regulation range, the logic signal at Test Point PGOOD2 is
also high. For the single dual-phase interleaved output configura-
tion, the PGOOD1 and PGOOD2 signals are tied together at
the Circuit Breaker CB2, which is a solder link. Use either
also high. For the single dual-phase interleaved output configura-
tion, the PGOOD1 and PGOOD2 signals are tied together at
the Circuit Breaker CB2, which is a solder link. Use either