Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Fiche De Données
Codes de produits
AT91SAM9N12-EK
501
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
32.8.11 DMAC Channel Handler Disable Register
Name: DMAC_CHDR
Address:
0xFFFFEC2C
Access: Write-only
Reset:
0x00000000
• DISx: Disable [7:0]
Write one to this field to disable the relevant DMAC Channel. The content of the FIFO is lost and the current AHB access is termi-
nated. Software must poll DIS[7:0] field in the DMAC_CHSR register to be sure that the channel is disabled.
nated. Software must poll DIS[7:0] field in the DMAC_CHSR register to be sure that the channel is disabled.
• RESx: Resume [7:0]
Write one to this field to resume the channel transfer restoring its context.
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
RES7
RES6
RES5
RES4
RES3
RES2
RES1
RES0
7
6
5
4
3
2
1
0
DIS7
DIS6
DIS5
DIS4
DIS3
DIS2
DIS1
DIS0