Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Fiche De Données
Codes de produits
AT91SAM9N12-EK
724
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
Figure 39-22. Programmer Sends Data While the Bus is Busy
Figure 39-23. Arbitration Cases
gives an example of read and write operations in Multi-master mode.
TWCK
TWD
DATA sent by a master
STOP sent by the master
START sent by the TWI
DATA sent by the TWI
Bus is busy
Bus is free
A transfer is programmed
(DADR + W + START + Write THR)
Transfer is initiated
TWI DATA transfer
Transfer is kept
Bus is considered as free
TWCK
Bus is busy
Bus is free
A transfer is programmed
(DADR + W + START + Write THR)
Transfer is initiated
TWI DATA transfer
Transfer is kept
Bus is considered as free
Data from a Master
Data from TWI
S
0
S
0
0
1
1
1
ARBLST
S
0
S
0
0
1
1
1
TWD
S
0
0
1
1 1
1 1
Arbitration is lost
TWI stops sending data
P
S
0
1
P
0
1
1
1
1
Data from the master
Data from the TWI
Arbitration is lost
The master stops sending data
Transfer is stopped
Transfer is programmed again
(DADR + W + START + Write THR)
TWCK
TWD