Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Fiche De Données

809

SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]

11063K–ATARM–05-Nov-13

0: The USART does not drive the SCK pin.

1: The USART drives the SCK pin if USCLKS does not select the external clock SCK.

0: 16x Oversampling.

1: 8x Oversampling.

0: The NACK is generated.

1: The NACK is not generated.

0: NACK is sent on the ISO line as soon as a parity error occurs in the received character (unless INACK is set).

1: Successive parity errors are counted up to the value specified in the MAX_ITERATION field. These parity errors generate a 
NACK on the ISO line. As soon as this value is reached, no additional NACK is sent on the ISO line. The flag ITERATION is 
asserted.

0: The data field transmitted on TXD line is the same as the one written in US_THR register or the content read in US_RHR is the 
same as RXD line. Normal mode of operation.

1: The data field transmitted on TXD line is inverted (voltage polarity only) compared to the value written on US_THR register or 
the content read in US_RHR is inverted compared to what is received on RXD line (or ISO7816 IO line). Inverted Mode of opera-
tion, useful for contactless card application. To be used with configuration bit MSBF.

0: User defined configuration of command or data sync field depending on MODSYNC value.

1: The sync field is updated when a character is written into US_THR register.

0–7: Defines the maximum number of iterations in mode ISO7816, protocol T = 0.

0: The USART does not filter the receive line.

1: The USART filters the receive line using a three-sample filter (1/16-bit clock) (2 over 3 majority).

0: Manchester Encoder/Decoder are disabled.

1: Manchester Encoder/Decoder are enabled.

0:The Manchester Start bit is a 0 to 1 transition

1: The Manchester Start bit is a 1 to 0 transition.

0: Start Frame delimiter is COMMAND or DATA SYNC.

1: Start Frame delimiter is One Bit.