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Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Fiche De Données

Codes de produits
AT91SAM9N12-EK
Télécharger
Page de 1104
881
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
Figure 42-15.  Buffer Structure when Classic ADC and Touchscreen Channels are Interleaved
Base Address (BA)
BA + 0x02
ADC_XPOSR
0
ADC_CDR8
8
1
BA + 0x04
8
BA + 0x06
ADC_YPOSR
1
ADC_XPOSR
0
BA + [(N-1) * 6]
BA + [(N-1) * 6]+ 0x02
Assuming ADC_TSMR(TSMOD) = 1
ADC_TSMR(TSAV) = ADC_TSMR(TSFREQ) = 0 
ADC_CHSR = 0x000_0100 , ADC_EMR(TAG) =1
trig.event1
DMA Buffer
Structure
trig.event2
trig.eventN
DMA Transfer
ADC_CDR8
ADC_YPOSR
Assuming ADC_TSMR(TSMOD) = 1
ADC_TSMR(TSAV) = ADC_TSMR(TSFREQ) = 0 
ADC_CHSR = 0x000_0100 , ADC_EMR(TAG) = 0
BA + 0x08
BA + 0x0A
8
ADC_YPOSR
1
ADC_XPOSR
0
ADC_CDR8
BA + [(N-1) * 6]+ 0x04
ADC_XPOSR
0
ADC_CDR8
0
0
0
ADC_YPOSR
0
ADC_XPOSR
0
trig.event1
DMA Buffer
Structure
trig.event2
trig.eventN
ADC_CDR8
ADC_YPOSR
0
ADC_YPOSR
0
ADC_XPOSR
0
ADC_CDR8
Base Address (BA)
BA + 0x02
ADC_XPOSR
0
ADC_CDR8
8
1
BA + 0x04
8
BA + 0x06
BA + [(N-1) * 8]
BA + [(N-1) * 8]+ 0x02
Assuming ADC_TSMR(TSMOD) = 1
ADC_TSMR(TSAV) = 0   ADC_TSMR(TSFREQ) = 1 
ADC_CHSR = 0x000_0100 , ADC_EMR(TAG) = 1
trig.event1
DMA Buffer
Structure
trig.event2
trig.eventN
DMA Transfer
ADC_CDR8
ADC_YPOSR
BA + 0x08
BA + 0x0A
8
ADC_YPOSR
1
ADC_XPOSR
0
ADC_CDR8
BA + [(N-1) * 8]+ 0x04
8
ADC_CDR8
ADC_XPOSR
0
1
ADC_YPOSR
trig.event3
trig.event4
BA + 0x0c
trig.eventN+1
8
ADC_CDR8
8
ADC_CDR8
BA + [(N-1) * 8]+ 0x06
BA + 0x0e
Assuming ADC_TSMR(TSMOD) = 1
ADC_TSMR(TSAV) = 1   ADC_TSMR(TSFREQ) = 1 
ADC_CHSR = 0x000_0100 , ADC_EMR(TAG) = 1
ADC_XPOSR
0
ADC_CDR8
8
1
8
trig.event1
DMA Buffer
Structure
trig.event2
trig.eventN
ADC_CDR8
ADC_YPOSR
trig.event3
trig.event4
trig.eventN+1
ADC_XPOSR
0
ADC_CDR8
8
1
8
ADC_CDR8
ADC_YPOSR
ADC_XPOSR
0
ADC_CDR8
8
1
8
ADC_CDR8
ADC_YPOSR