Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Fiche De Données
Codes de produits
AT91SAM9N12-EK
1028
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
46.5.2 SHA Mode Register
Name: SHA_MR
Address:
0xF0014004
Access:
Read-write
• SMOD: Start Mode
Values which are not listed in table must be considered as “reserved”.
If a DMA transfer is used, either 0x1 or 0x2 must be configured. Refer to
• PROCDLY: Processing Delay
When SHA1 algorithm is processed, runtime period is either 85 or 209 clock cycles.
When SHA256 or SHA224 algorithm is processed, runtime period is either 72 or 194 clock cycles.
• ALGO: SHA Algorithm.
Values which are not listed in table must be considered as “reserved”.
• DUALBUFF: Dual Input BUFFer
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
DUALBUFF
15
14
13
12
11
10
9
8
–
–
–
ALGO
7
6
5
4
3
2
1
0
–
PROCDLY
–
–
SMOD
Value
Name
Description
0x0
MANUAL_START
Manual Mode
0x1
AUTO_START
Auto Mode
0x2
IDATAR0_START
SHA_IDATAR0 access only Auto Mode
Value
Name
Description
0x0
SHORTEST
SHA processing runtime is the shortest one
0x1
LONGEST
SHA processing runtime is the longest one
Value
Name
Description
0x0
SHA1
SHA1 algorithm processed
0x1
SHA256
SHA256 algorithm processed
0x4
SHA224
SHA224 algorithm processed
Value
Name
Description
0x0
INACTIVE
SHA_IDATARx and SHA_IODATARx cannot be written during processing of previous block.
0x1
ACTIVE
SHA_IDATARx and SHA_IODATARx can be written during processing of previous block
when SMOD=0x2. It speeds up the overall runtime of large files.
when SMOD=0x2. It speeds up the overall runtime of large files.