Atmel Evaluation Kit AT91SAM9X25-EK AT91SAM9X25-EK Fiche De Données
Codes de produits
AT91SAM9X25-EK
1045
SAM9X25 [DATASHEET]
11054E–ATARM–10-Mar-2014
45.6.5 Receive Buffer Queue Pointer Register
Name:
EMAC_RBQP
Address:
0xF802C018
Access:
Read-write
This register points to the entry in the receive buffer queue (descriptor list) currently being used. It is written with the start location
of the receive buffer descriptor list. The lower order bits increment as buffers are used up and wrap to their original values after
either 1024 buffers or when the wrap bit of the entry is set.
of the receive buffer descriptor list. The lower order bits increment as buffers are used up and wrap to their original values after
either 1024 buffers or when the wrap bit of the entry is set.
Reading this register returns the location of the descriptor currently being accessed. This value increments as buffers are used.
Software should not use this register for determining where to remove received frames from the queue as it constantly changes
as new frames are received. Software should instead work its way through the buffer descriptor queue checking the used bits.
Software should not use this register for determining where to remove received frames from the queue as it constantly changes
as new frames are received. Software should instead work its way through the buffer descriptor queue checking the used bits.
Receive buffer writes also comprise bursts of two words and, as with transmit buffer reads, it is recommended that bit 2 is always
written with zero to prevent a burst crossing a 1K boundary, in violation of section 3.6 of the AMBA specification.
written with zero to prevent a burst crossing a 1K boundary, in violation of section 3.6 of the AMBA specification.
• ADDR:
Receive Buffer Queue Pointer Address
Written with the address of the start of the receive queue, reads as a pointer to the current buffer being used.
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