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SAM4S [DATASHEET]

11100E–ATARM–24-Jul-13

The processor pops the stack and restores the processor state to the state it had before the interrupt occurred. See

This mechanism speeds up exception servicing. On completion of an exception handler, if there is a pending exception
that meets the requirements for exception entry, the stack pop is skipped and control transfers to the new exception
handler.

This mechanism speeds up preemption. If a higher priority exception occurs during state saving for a previous exception,
the processor switches to handle the higher priority exception and initiates the vector fetch for that exception. State
saving is not affected by late arrival because the state saved is the same for both exceptions. Therefore the state saving
continues uninterrupted. The processor can accept a late arriving exception until the first instruction of the exception
handler of the original exception enters the execute stage of the processor. On return from the exception handler of the
late-arriving exception, the normal tail-chaining rules apply.

An Exception entry occurs when there is a pending exception with sufficient priority and either the processor is in Thread
mode, or the new exception is of a higher priority than the exception being handled, in which case the new exception
preempts the original exception.

When one exception preempts another, the exceptions are nested.

Sufficient priority means that the exception has more priority than any limits set by the mask registers, see 

. An exception with less priority than this is pending but is not handled by the processor.

When the processor takes an exception, unless the exception is a tail-chained or a late-arriving exception, the processor
pushes information onto the current stack. This operation is referred as stacking and the structure of eight data words is
referred to as stack frame.