Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Fiche De Données
Codes de produits
ATSAM4S-WPIR-RD
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
166
12.6.7.5 QDADD and QDSUB
Saturating Double and Add and Saturating Double and Subtract, signed.
Syntax
Syntax
op{cond} {Rd}, Rm, Rn
where:
opis one of:
QDADD Saturating Double and Add.
QDSUB Saturating Double and Subtract.
condis an optional condition code, see
opis one of:
QDADD Saturating Double and Add.
QDSUB Saturating Double and Subtract.
condis an optional condition code, see
.
Rdis the destination register.
Rm, Rnare registers holding the first and second operands.
Operation
The QDADD instruction:
Rm, Rnare registers holding the first and second operands.
Operation
The QDADD instruction:
Doubles the second operand value.
Adds the result of the doubling to the signed saturated value in the first operand.
Writes the result to the destination register.
The QDSUB instruction:
Doubles the second operand value.
Subtracts the doubled value from the signed saturated value in the first operand.
Writes the result to the destination register.
Both the doubling and the addition or subtraction have their results saturated to the 32-bit signed integer range –
2
31
≤ x ≤ 2
31
– 1. If saturation occurs in either operation, it sets the Q flag in the APSR.
Restrictions
Do not use SP and do not use PC
Do not use SP and do not use PC
.
Condition Flags
If saturation occurs, these instructions set the Q flag to 1.
Examples
If saturation occurs, these instructions set the Q flag to 1.
Examples
QDADD
R7, R4, R2
; Doubles and saturates R4 to 32 bits, adds R2,
; saturates to 32 bits, writes to R7
QDSUB
R0, R3, R5
; Subtracts R3 doubled and saturated to 32 bits
; from R5, saturates to 32 bits, writes to R0.