Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Fiche De Données

Codes de produits
ATSAM4S-WPIR-RD
Page de 1231
709
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
Figure 34-17. TWI Write Operation with Multiple Data Bytes with or without Internal Address
Set the Control register:
- Master enable
TWI_CR = MSEN + SVDIS
Set the Master Mode register:
- Device slave address
- Internal address size 
(if IADR used)
- Transfer direction bit
Write ==> bit MREAD = 0
Internal address size = 0?
Load Transmit register
TWI_THR = Data to send
Read Status register
TXRDY = 1?
Data to send?
Read Status register
TXCOMP = 1?
END
BEGIN
Set the internal address
TWI_IADR = address
Yes
TWI_THR = data to send
Yes
Yes
Yes
No
No
No
Write STOP Command
TWI_CR = STOP
No
Set TWI clock
(CLDIV, CHDIV, CKDIV) in TWI_CWGR
(Needed only once)