Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Fiche De Données

32072H–AVR32–10/2012

As for single data transfers, the TXRDY and RXRDY bits in the Status Register indicates when
data to transmit can be written to THR, or when received data can be read from RHR. Transfer
of data to THR and from RHR can also be done automatically by DMA, see 

Consider the following transfer:

START, DADR+W, DATA+A, DATA+A, REPSTART, DADR+W, DATA+A, DATA+A, STOP.

To generate this transfer:

1.

Write CMDR with START=1, STOP=0, DADR, NBYTES=2 and READ=0.

2.

Write NCMDR with START=1, STOP=1, DADR, NBYTES=2 and READ=0.

3.

Wait until SR.TXRDY==1, then write first data byte to transfer to THR.

4.

Wait until SR.TXRDY==1, then write second data byte to transfer to THR.

5.

Wait until SR.TXRDY==1, then write third data byte to transfer to THR.

6.

Wait until SR.TXRDY==1, then write fourth data byte to transfer to THR.

Consider the following transfer:

START, DADR+R, DATA+A, DATA+NA, REPSTART, DADR+R, DATA+A, DATA+NA, STOP.

To generate this transfer:

1.

Write CMDR with START=1, STOP=0, DADR, NBYTES=2 and READ=1.

2.

Write NCMDR with START=1, STOP=1, DADR, NBYTES=2 and READ=1.

3.

Wait until SR.RXRDY==1, then read first data byte received from RHR.

4.

Wait until SR.RXRDY==1, then read second data byte received from RHR.

5.

Wait until SR.RXRDY==1, then read third data byte received from RHR.

6.

Wait until SR.RXRDY==1, then read fourth data byte received from RHR.

If combining several transfers, without any STOP or REPEATED START between them, remem-
ber to write a one to the ACKLAST bit in CMDR to keep from ending each of the partial transfers
with a NACK.

Consider the following transfer:

START, DADR+W, DATA+A, DATA+A, REPSTART, DADR+R, DATA+A, DATA+NA, STOP.