Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Fiche De Données

Codes de produits
AT32UC3A3-XPLD
Page de 1021
548
32072H–AVR32–10/2012
AT32UC3A3
25.4
I/O Lines Description 
25.5
Product Dependencies
In order to use this module, other parts of the system must be configured correctly, as described
below.
25.5.1
I/O Lines
The USART pins may be multiplexed with the I/O Controller lines. The user must first configure
the I/O Controller to assign these pins to their peripheral functions. Unused I/O lines may be
used for other purposes.
To prevent the TXD line from falling when the USART is disabled, the use of an internal pull-up
is required. If the hardware handshaking feature or modem mode is used, the internal pull-up on
RTS must also be enabled.
All the pins of the modems may or may not be implemented on the USART. On USARTs not
equipped with the corresponding pins, the associated control bits and statuses have no effect on
the behavior of the USART.
Table 25-1.
SPI Operating Mode
PIN
USART
SPI Slave 
SPI Master
RXD
RXD
MOSI
MISO
TXD
TXD
MISO
MOSI
RTS
RTS
CS
CTS
CTS
CS
Table 25-2.
I/O Lines Description
Name
Description
Type
Active Level
CLK
Serial Clock
I/O
TXD
Transmit Serial Data
or Master Out Slave In (MOSI) in SPI master mode
or Master In Slave Out (MISO) in SPI slave mode
Output
RXD
Receive Serial Data
or Master In Slave Out (MISO) in SPI master mode
or Master Out Slave In (MOSI) in SPI slave mode
Input
RI
Ring Indicator
Input
Low
DSR
Data Set Ready
Input
Low
DCD
Data Carrier Detect
Input
Low
DTR
Data Terminal Ready 
Output
Low
CTS
Clear to Send
or Slave Select (NSS) in SPI slave mode
Input
Low
RTS
Request to Send
or Slave Select (NSS) in SPI master mode
Output
Low