Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Fiche De Données

32072H–AVR32–10/2012

According to LIN 1.3, the wakeup request should be generated with the character 0x80 in order
to impose eight successive dominant bits.

According to LIN 2.0, the wakeup request is issued by forcing the bus into the dominant state for
250µs to 5ms. Sending the character 0xF0 does this, regardless of baud rate.

• Baud rate max = 20 kbit/s -> one bit period = 50µs -> five bit periods = 250µs

• Baud rate min = 1 kbit/s -> one bit period = 1ms -> five bit periods = 5ms

LIN bus inactivity should eventually cause slaves to time out and enter sleep mode. LIN 1.3
specifies this to 25000 bit periods, whilst LIN 2.0 specifies 4 seconds. For the time-out counter
operation see 

The USART features a Serial Peripheral Interface (SPI) link compliant mode, supporting syn-
chronous, full-duplex communication in both master and slave mode. Writing 0xE (master) or
0xF (slave) to MR.MODE will enable this mode. An SPI in master mode controls the data flow to
and from the other SPI devices, which are in slave mode. It is possible to let devices take turns
being masters (aka multi-master protocol), and one master may shift data simultaneously into
several slaves, but only one slave may respond at a time. A slave is selected when its slave
select (NSS) signal has been raised by the master. The USART can only generate one NSS sig-
nal, and it is possible to use standard I/O lines to address more than one slave.

The SPI system consists of two data lines and two control lines:

• Master Out Slave In (MOSI): This line supplies the data shifted from master to slave. In 

master mode this is connected to TXD, and in slave mode to RXD.

• Master In Slave Out (MISO): This line supplies the data shifted from slave to master. In 

master mode this is connected to RXD, and in slave mode to TXD.

• Serial Clock (CLK): This is controlled by the master. One period per bit transmission. In both 

modes this is connected to CLK.

• Slave Select (NSS): This control line allows the master to select or deselect a slave. In 

master mode this is connected to RTS, and in slave mode to CTS.

Changing SPI mode after initial configuration must be followed by a transceiver software reset in
order to avoid unpredictable behavior.

Table 25-15. Receiver Time-out Values (RTOR.TO)

2.0

1 000 bit/s

4s

4 000

2 400 bit/s

9 600

9 600 bit/s

38 400

19 200 bit/s

76 800

20 000 bit/s

80 000

1.3

-

25 000 bit periods

25 000