Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Fiche De Données
Codes de produits
ATSAMD21-XPRO
128
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181C–SAM-D21_Datasheet–07/2014
15.8.9 APBB Mask
Name:
APBBMASK
Offset:
0x1C
Reset:
0x0000007F
Property:
Write-Protected
z
Bits 31:6 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z
Bit 5 – USB: USB APB Clock Enable
0: The APBB clock for the USB is stopped.
1: The APBB clock for the USB is enabled.
0: The APBB clock for the USB is stopped.
1: The APBB clock for the USB is enabled.
z
Bit 4 – DMAC: DMAC APB Clock Enable
0: The APBB clock for the DMAC is stopped.
1: The APBB clock for the DMAC is enabled.
0: The APBB clock for the DMAC is stopped.
1: The APBB clock for the DMAC is enabled.
z
Bit 3 – PORT: PORT APB Clock Enable
0: The APBB clock for the PORT is stopped.
1: The APBB clock for the PORT is enabled.
0: The APBB clock for the PORT is stopped.
1: The APBB clock for the PORT is enabled.
z
Bit 2 – NVMCTRL: NVMCTRL APB Clock Enable
0: The APBB clock for the NVMCTRL is stopped.
1: The APBB clock for the NVMCTRL is enabled.
0: The APBB clock for the NVMCTRL is stopped.
1: The APBB clock for the NVMCTRL is enabled.
Bit
31
30
29
28
27
26
25
24
Access
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
Bit
23
22
21
20
19
18
17
16
Access
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
Access
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
USB
DMAC
PORT
NVMCTRL
DSU
PAC1
Access
R
R
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
1
1
1
1
1
1