Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Fiche De Données
Codes de produits
ATSAMD21-XPRO
220
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181C–SAM-D21_Datasheet–07/2014
18.5.3 Clocks
The RTC bus clock (CLK_RTC_APB) can be enabled and disabled in the Power Manager, and the default state of
CLK_RTC_APB can be found in the Peripheral Clock Masking section in the
CLK_RTC_APB can be found in the Peripheral Clock Masking section in the
A generic clock (GCLK_RTC) is required to clock the RTC. This clock must be configured and enabled in the Generic
Clock Controller before using the RTC. Refer to
Clock Controller before using the RTC. Refer to
This generic clock is asynchronous to the user interface clock (CLK_RTC_APB). Due to this asynchronicity, accessing
certain registers will require synchronization between the clock domains. Refer to
certain registers will require synchronization between the clock domains. Refer to
for
further details.
The RTC should never be used with the generic clock generator 0.
18.5.4 DMA
Not applicable.
18.5.5 Interrupts
The interrupt request line is connected to the Interrupt Controller. Using the RTC interrupts requires the Interrupt
Controller to be configured first. Refer to
Controller to be configured first. Refer to
for details.
18.5.6 Events
To use the RTC event functionality, the corresponding events need to be configured in the event system. Refer to
for details.
18.5.7 Debug Operation
When the CPU is halted in debug mode the RTC will halt normal operation. The RTC can be forced to continue operation
during debugging. Refer to the Debug Control (
during debugging. Refer to the Debug Control (
) register for details.
18.5.8 Register Access Protection
All registers with write-access are optionally write-protected by the peripheral access controller (PAC), except the
following registers:
following registers:
z
Interrupt Flag Status and Clear register (
z
z
)
z
Debug register (
Write-protection is denoted by the Write-Protection property in the register description.
When the CPU is halted in debug mode, all write-protection is automatically disabled.
Write-protection does not apply for accesses through an external debugger. Refer to
18.5.9 Analog Connections
A 32.768kHz crystal can be connected to the XIN32 and XOUT32 pins, along with any required load capacitors. For
details on recommended crystal characteristics and load capacitors, refer to
details on recommended crystal characteristics and load capacitors, refer to
details.