Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Fiche De Données
Codes de produits
ATSAMD21-XPRO
292
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181C–SAM-D21_Datasheet–07/2014
19.8.1.5 CRC Status
Name:
CRCSTATUS
Offset:
0x0C
Reset:
0x00
Property:
Write-Protected
z
Bits 7:2 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z
Bit 1 – CRCZERO: CRC Zero
This bit is cleared when a new CRC source is selected.
This bit is set when the CRC generation is complete and the CRC Checksum is zero.
This bit is cleared when a new CRC source is selected.
This bit is set when the CRC generation is complete and the CRC Checksum is zero.
z
Bit 0 – CRCBUSY: CRC Module Busy
When used with an I/O interface (
When used with an I/O interface (
.CRCSRC is 0x1), this bit is cleared by writing a one to it.
.CRCSRC is 0x1), this bit is set when the CRC Data Input (
) register is written.
When used with a DMA channel (
.CRCSRC is 0x20 to 0x3F), this bit is cleared when the corresponding
DMA channel is disabled.
When used with a DMA channel (
When used with a DMA channel (
.CRCSRC is 0x20 to 0x3F), this bit is set when the corresponding
DMA channel is enabled.
Writing a zero to this bit has no effect.
When used with an I/O interface(
Writing a zero to this bit has no effect.
When used with an I/O interface(
.CRCSRC is 0x1), writing a one to this bit will clear the CRC Module
Busy bit.
When used with a DMA channel, writing a one to this bit has no effect.
When used with a DMA channel, writing a one to this bit has no effect.
Bit
7
6
5
4
3
2
1
0
CRCZERO
CRCBUSY
Access
R
R
R
R
R
R
R
R/W
Reset
0
0
0
0
0
0
0
0