Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Fiche De Données

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Atmel | SMART SAM D21 [DATASHEET]

Atmel-42181C–SAM-D21_Datasheet–07/2014

The Inter-IC Sound Controller (I

2

S) provides bidirectional, synchronous and digital audio link with external audio devices. 

This controller is compliant with the Inter-IC Sound (I

2

S) bus specification. It supports TDM interface with external multi-

slot audio codecs. It also supports PDM interface with external MEMS microphones.

The I

2

S consists of 2 Clock Units and 2 Serializers, that can be enabled separately, to provide Master, Slave, or controller 

modes, and operate as Receiver or Transmitter.

The pins associated with I

2

S peripheral are SDm, FSn, SCKn, and MCKn pins, where n is the number of clock units and 

m is the number of Serializers (n= 0..1, m=0..1).

FSn is referred to as Word Select in standard I

2

S mode operation and as Frame Sync in TDM mode. DMAC channels, 

separate for each Serializer, allow a continuous high bitrate data transfer without processor intervention to the following:

z

Audio CODECs in Master, Slave, or Controller mode

z

Stereo DAC or ADC through dedicated I

2

S serial interface

z

Multi-slot or multiple stereo DACs or ADCs, using the TDM format

z

Mono or stereo MEMS microphones, using the PDM interface

z

1-channel burst transfer with non-periodic Frame Sync

For each Serializer, the I

2

S can use either a single DMAC channel for all data channels or two separate DMAC channels 

for different data channels.

The I

2

S supports 8- and 16-bit compact stereo data format. This helps in reducing the required DMA bandwidth by 

transferring the left and right samples within the same data word.

Usually external audio codec or digital signal processor (DSP) requires clock which is the multiple of sampling frequency 
fs (eg. 384fs). The I

2

S peripheral in Master Mode and Controller mode is capable of generating an output clock signal 

ranging from 16fs to 1024fs on Master Clock pin (MCKn).

z

Compliant with Inter-IC Sound (I

2

S) bus specification

z

2 independent Serializers configurable as receiver or as transmitter

z

Several data formats supported:

z

32-, 24-, 20-, 18-, 16-, and 8-bit mono or stereo format

z

16- and 8-bit compact stereo format, with left and right samples are packed in the same word to reduce data transfers

z

Several data frame formats supported:

z

2-channel I

2

S with Word Select

z

1- to 8-slot Time Division Multiplexed (TDM) with Frame Sync and individually enabled slots

z

1- or 2-channel Pulse Density Modulation (PDM) reception for MEMS microphones

z

1-channel burst transfer with non-periodic Frame Sync

z

2 independent Clock Units handling either the same clocks or separate clocks for the Serializers:

z

Suitable for a wide range of sample frequencies (fs), including 32kHz, 44.1kHz, 48kHz, 88.2kHz, 96kHz, and 192kHz

z

16fs to 1024fs Master Clock generated for external audio codecs

z

Master, slave, and controller modes:

z

Master: Data received/transmitted based on internally-generated clocks. Output Serial Clock on SCKn pin, Master 
Clock on (MCKn) pin, and Frame Sync Clock on FSn pin

z

Slave: Data received/transmitted based on external clocks on Serial Clock pin (SCKn) or Master Clock pin (MCKn)

z

Controller: Only output internally generated Master clock (MCKn), Serial Clock (SCKn), and Frame Sync Clock (FSn)

z

Individual enable and disable of Clock Units and Serializers

z

DMAC interfaces for each Serializer receiver or transmitter to reduce processor overhead:

z

Either one DMAC channel for all data slots or

z

One DMAC channel per data channel in stereo