Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Fiche De Données

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Atmel | SMART SAM D21 [DATASHEET]

Atmel-42181C–SAM-D21_Datasheet–07/2014

The I

2

S uses three or four communication lines for synchronous data transfer:

z

SDm for receiving or transmitting in Serializer m (m=0..1)

z

SCKn for the serial clock in Clock Unit n (n=0..1)

z

FSn for the frame synchronization or I

2

S word select, identifying the beginning of each frame

z

Optionally, MCKn to output an oversampling clock to an external codec

I

2

S data transfer is frame based, where a serial frame:

z

Starts with the frame synchronization active edge and 

z

Consists of 1 to 8 data slots, that are 8-, 16-, 24-, or 32-bit wide.

Each data slot is used to transfer one data sample of 8, 16, 18, 20, 24 or 32 bits.

Frame based data transfer is described in the following figure:

I

2

S supports multiple data formats such as:

z

32-, 24-, 20-, 18-, 16-, and 8-bit mono or stereo format

z

16- and 8-bit compact stereo format, with left and right samples packed in the same word to reduce data transfers

In mono format, Transmit mode, data written to the left channel is duplicated to the right output channel. In mono format, 
Receiver mode, data received from the right channel is ignored and data received from the left channel is duplicated in to 
the right channel. 

In mono format, TDM Transmit mode with more than two slots, data written to the even-numbered slots is duplicated in to 
the following odd-numbered slot.

In mono format, TDM Receiver mode with more than two slots, data received from the even-numbered slots is duplicated 
in to the following odd-numbered slot.

Frame n-1

Frame n+2

Frame n

Frame n+1

Slot 1

Slot 2

Slot N

MSB

LSB

Sample period 

T

s 

= f

s

-1

Sampling frequency fs

FS

SD

SCK

MCK

8-, 16-, 18-, 20-, 24-, 32-bit formats 

1 to 8 time slots for TDM