Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Fiche De Données
Codes de produits
ATSAMD21-XPRO
620
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181C–SAM-D21_Datasheet–07/2014
29.8.3 Control B Clear
This register allows the user to change this register without doing a read-modify-write operation. Changes in this register
will also be reflected in the Control B Set (CTRLBSET) register.
will also be reflected in the Control B Set (CTRLBSET) register.
Name:
CTRLBCLR
Offset:
0x04
Reset:
0x00
Property:
Write-Protected, Write-Synchronized, Read-Synchronized
z
Bits 7:6 – CMD[1:0]: Command
These bits are used for software control of retriggering and stopping the TC. When a command has been exe-
cuted, the CMD bit group will read back as zero. The commands are executed on the next prescaled GCLK_TC
clock cycle.
Writing a zero to one of these bits has no effect.
Writing a one to one of these bits will clear the pending command.
These bits are used for software control of retriggering and stopping the TC. When a command has been exe-
cuted, the CMD bit group will read back as zero. The commands are executed on the next prescaled GCLK_TC
clock cycle.
Writing a zero to one of these bits has no effect.
Writing a one to one of these bits will clear the pending command.
Table 29-9. Command
z
Bits 5:3 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z
Bit 2 – ONESHOT: One-Shot
This bit controls one-shot operation of the TC. When in one-shot mode, the TC will stop counting on the next over-
flow/underflow condition or a stop command.
0: The TC will wrap around and continue counting on an overflow/underflow condition.
1: The TC will wrap around and stop on the next underflow/overflow condition.
Writing a zero to this bit has no effect.
Writing a one to this bit will disable one-shot operation.
This bit controls one-shot operation of the TC. When in one-shot mode, the TC will stop counting on the next over-
flow/underflow condition or a stop command.
0: The TC will wrap around and continue counting on an overflow/underflow condition.
1: The TC will wrap around and stop on the next underflow/overflow condition.
Writing a zero to this bit has no effect.
Writing a one to this bit will disable one-shot operation.
z
Bit 1 – Reserved
This bit is unused and reserved for future use. For compatibility with future devices, always write this bit to zero
when this register is written. This bit will always return zero when read.
This bit is unused and reserved for future use. For compatibility with future devices, always write this bit to zero
when this register is written. This bit will always return zero when read.
z
Bit 0 – DIR: Counter Direction
This bit is used to change the direction of the counter.
0: The timer/counter is counting up (incrementing).
This bit is used to change the direction of the counter.
0: The timer/counter is counting up (incrementing).
Bit
7
6
5
4
3
2
1
0
CMD[1:0]
ONESHOT
DIR
Access
R/W
R/W
R
R
R
R/W
R
R/W
Reset
0
0
0
0
0
0
0
0
Value
Name
Description
0x0
NONE
No action
0x1
RETRIGGER
Force a start, restart or retrigger
0x2
STOP
Force a stop
0x3
-
Reserved