Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Fiche De Données

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Atmel | SMART SAM D21 [DATASHEET]

Atmel-42181C–SAM-D21_Datasheet–07/2014

For a period and width of the pulse of input signal in frequency and duty cycle, enable capture on CC0 and CC1 channels 
by writing a one to the Capture Channel x Enable bit in the Control A register (CTRLA.CPTENx). When only one of these 
measurements is required, the second channel can be used for other purposes.

The TCC can detect capture overflow of the input capture channels. Capture overflow occurs when the Capture Interrupt 
Flag is set and a new capture event is detected, there is nowhere to store the new timestamp. In that case 
INTFLAG.ERR is set.
Note:

In dual-slope PWM operation, when TOP is lower than MAX/2 the CCx MSB captures the CTRLB.DIR state to 
identify the ramp (rising if CCx[MSB] is zero, or falling if CCx[MSB] is one) on which the Counter capture has 
been done.

When one-shot is enabled, the counter automatically stops on the next counter overflow or underflow condition. When 
the counter is stopped, STATUS.STOP is set and the waveform outputs are set to the value defined by the Non-
Recoverable State x Output Enable (NREx) and Non-Recoverable State x Output Value (NRVx) bits in the Drive Control 
register (DRVCTRL.NREx and DRVCTRL.NRVx).

One-shot operation can be enabled by writing a one to the One-Shot bit in the Control B Set register 
(CTRLBSET.ONESHOT) and disabled by writing a one to the One-Shot bit in the Control B Clear register 
(CTRLBCLR.ONESHOT). When enabled, the TCC will count until an overflow or underflow occurs and stop counting. 
The one-shot operation can be restarted by using retrigger software command, a retrigger event or a start event.

When the counter restarts its operation, the Stop bit in the Status register (STATUS.STOP) is cleared.

The Period register (PER) and the compare channels register (CC0 to CC3) support circular buffer operation. When 
circular buffer operation is enabled, at each update condition, the (PER) or CCx values are copied into the corresponding 
buffer registers. Circular buffer are dedicated to RAMP2, RAMP2A, and DSBOTH operations.

The TCC supports dithering on Pulse-width or Period on a 16, 32 or 64 PWM cycles frame.