Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Fiche De Données
Codes de produits
ATSAMD21-XPRO
732
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181C–SAM-D21_Datasheet–07/2014
31.
USB – Universal Serial Bus
31.1 Overview
The Universal Serial Bus interface (USB) module complies with the Universal Serial Bus (USB) 2.1 specification
supporting both device and embedded host modes.
supporting both device and embedded host modes.
The USB device mode supports
8
endpoint addresses. All endpoint addresses have one input and one output endpoint,
for a total of
16
endpoints. Each endpoint is fully configurable in any of the four transfer types: control, interrupt, bulk or
isochronous. The USB host mode supports up to 8 pipes. The maximum data payload size is selectable up to 1023
bytes.
bytes.
Internal SRAM is used to keep the configuration and data buffer for each endpoint. The memory locations used for the
endpoint configurations and data buffers is fully configurable. The amount of memory allocated is dynamic according to
the number of endpoints in use, and the configuration of these. The USB module has a built-in Direct Memory Access
(DMA) and will read/write data from/to the system RAM when a USB transaction takes place. No CPU or DMA Controller
resources are required.
endpoint configurations and data buffers is fully configurable. The amount of memory allocated is dynamic according to
the number of endpoints in use, and the configuration of these. The USB module has a built-in Direct Memory Access
(DMA) and will read/write data from/to the system RAM when a USB transaction takes place. No CPU or DMA Controller
resources are required.
To maximize throughput, an endpoint can be configured for ping-pong operation. When this is done the input and output
endpoint with the same address are used in the same direction. The CPU or DMA Controller can then read/write one
data buffer while the USB module writes/reads from the other buffer. This gives double buffered communication.
endpoint with the same address are used in the same direction. The CPU or DMA Controller can then read/write one
data buffer while the USB module writes/reads from the other buffer. This gives double buffered communication.
Multi-packet transfer enables a data payload exceeding the maximum packet size of an endpoint to be transferred as
multiple packets without any software intervention. This reduces the number of interrupts and software intervention
needed for USB transfers.
multiple packets without any software intervention. This reduces the number of interrupts and software intervention
needed for USB transfers.
For low power operation the USB module can put the microcontroller in any sleep mode when the USB bus is idle and a
suspend condition is given. Upon bus resume the USB module can wake the microcontroller from any sleep mode.
suspend condition is given. Upon bus resume the USB module can wake the microcontroller from any sleep mode.
31.2 Features
z
Compatible with the USB 2.1 specification
z
USB Embedded Host and Device mode
z
Supports full (12Mbit/s) and low (1.5Mbit/s) speed communication
z
Supports Link Power Management (LPM-L1) protocol
z
On-chip transceivers with built-in pull-ups and pull-downs
z
On-Chip USB serial resistors
z
1kHz SOF clock available on external pin
z
Device mode
z
Supports 8 IN endpoints and 8 OUT endpoints
z
No endpoint size limitations
z
Built-in DMA with multi-packet and dual bank for all endpoints
z
Supports feedback endpoint
z
Supports crystal less clock
z
Host mode
z
Supports 8 physical pipes
z
No pipe size limitations
z
Supports multiplexed virtual pipe on one physical pipe to allow an unlimited USB tree
z
Built-in DMA with multi-packet support and dual bank for all pipes
z
Supports feedback endpoint
z
Supports the USB 2.0 Phase-locked SOFs feature