Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Fiche De Données
Codes de produits
ATSAMD21-XPRO
767
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181C–SAM-D21_Datasheet–07/2014
31.8.2 Device Registers - Common
31.8.2.1 Control B
Name:
CTRLB
Offset:
0x08
Reset:
0x0001
Property:
Write-Protected
z
Bits 15:12 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z
Bits 11:10 – LPMHDSK[1:0]: Link Power Management Handshake
These bits select the Link Power Management Handshake configuration as shown in
These bits select the Link Power Management Handshake configuration as shown in
.
Table 31-10. LPMHDSK Selection
z
Bit 9 – GNAK: Global NAK
This bit configures the operating mode of the NAK.
0: The handshake packet reports the status of the USB transaction
1: A NAK handshake is answered for each USB transaction regardless of the current endpoint memory bank
status
This bit is not synchronized.
This bit configures the operating mode of the NAK.
0: The handshake packet reports the status of the USB transaction
1: A NAK handshake is answered for each USB transaction regardless of the current endpoint memory bank
status
This bit is not synchronized.
z
Bits 8:5 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z
Bit 4 – NREPLY: No reply excepted SETUP Token
0: Disable the “NO_REPLY” feature: Any transaction to endpoint 0 will be handled according to the USB2.0
standard.
1: Enable the “NO_REPLY” feature: Any transaction to endpoint 0 will be ignored except SETUP.
This bit is cleared by hardware when receiving a SETUP packet.
0: Disable the “NO_REPLY” feature: Any transaction to endpoint 0 will be handled according to the USB2.0
standard.
1: Enable the “NO_REPLY” feature: Any transaction to endpoint 0 will be ignored except SETUP.
This bit is cleared by hardware when receiving a SETUP packet.
Bits
15
14
13
12
11
10
9
8
LPMHD[1:0]
GNAK
Access
R
R
R
R
R/W
R/W
R/W
R/
Reset
0
0
0
0
0
0
0
0
Bits
7
6
5
4
3
2
1
0
NREPLY
SPDCONF[1:0]
UPRSM
DETACH
Access
R
R
R
R
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
LPMHDSK[1:0]
Description
0x0
No handshake. LPM is not supported
0x1
ACK
0x2
NYET
0x3
Reserved