Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Fiche De Données
Codes de produits
ATSAMD21-XPRO
93
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181C–SAM-D21_Datasheet–07/2014
14.8.1 Control
Name:
CTRL
Offset:
0x0
Reset:
0x00
Property:
Write-Protected, Write-Synchronized
z
Bits 7:1 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z
Bit 0 – SWRST: Software Reset
0: There is no reset operation ongoing.
1: There is a reset operation ongoing.
Writing a zero to this bit has no effect.
Writing a one to this bit resets all registers in the GCLK to their initial state after a power reset, except for generic
clocks and associated generators that have their WRTLOCK bit in
0: There is no reset operation ongoing.
1: There is a reset operation ongoing.
Writing a zero to this bit has no effect.
Writing a one to this bit resets all registers in the GCLK to their initial state after a power reset, except for generic
clocks and associated generators that have their WRTLOCK bit in
read as one.
Refer to
Refer to
for details on GENDIV reset.
Refer to
Due to synchronization, there is a delay from writing CTRL.SWRST until the reset is complete. CTRL.SWRST and
STATUS.SYNCBUSY will both be cleared when the reset is complete.
STATUS.SYNCBUSY will both be cleared when the reset is complete.
Bit
7
6
5
4
3
2
1
0
SWRST
Access
R
R
R
R
R
R
R
R/W
Reset
0
0
0
0
0
0
0
0