Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Fiche De Données

Codes de produits

ATSAMD21-XPRO

990

Atmel | SMART SAM D21 [DATASHEET]

Atmel-42181C–SAM-D21_Datasheet–07/2014

None

7 - If the external XOSC32K is broken, neither the external pin RST nor the
GCLK software reset can reset the GCLK generators using XOSC32K as
source clock. Errata reference: 12164

Fix/Workaround:

Do a power cycle to reset the GCLK generators after an external XOSC32K
failure.

39.1.2 PM

1 - In debug mode, if a watchdog reset occurs, the debug session is lost.
Errata reference: 12196

Fix/Workaround:

A new debug session must be restart after a watchdog reset.

39.1.3 DFLL48M

1 - The DFLL clock must be requested before being configured otherwise a
write access to a DFLL register can freeze the device. Errata reference: 9905

Fix/Workaround:

Write a zero to the DFLL ONDEMAND bit in the DFLLCTRL register before
configuring the DFLL module.

2 - If the DFLL48M reaches the maximum or minimum COARSE or FINE
calibration values during the locking sequence, an out of bounds interrupt
will be generated. These interrupts will be generated even if the final
calibration values at DFLL48M lock are not at maximum or minimum, and
might therefore be false out of bounds interrupts. Errata reference: 10669

Fix/Workaround:

Check that the lockbits: DFLLLCKC and DFLLLCKF in the SYSCTRL Interrupt
Flag Status and Clear register (INTFLAG) are both set before enabling the
DFLLOOB interrupt.

3 - The DFLL status bits in the PCLKSR register during the USB clock
recovery mode can be wrong after a USB suspend state. Errata reference:
11938

Fix/Workaround:

Do not monitor the DFLL status bits in the PCLKSR register during the USB clock
recovery mode.