Linear Technology DC1096-B LTC2642 16-Bit Unbuffered VOUT DAC DC1096B DC1096B Fiche De Données

Codes de produits
DC1096B
Page de 24
LTC2641/LTC2642
15
26412fc
For more information 
www.linear.com/LTC2641
applicaTions inForMaTion
Unbuffered Operation and V
OUT
 Loading
The DAC output is available directly at the V
OUT
 pin, which 
swings from GND to V
REF 
. Unbuffered operation provides 
the lowest possible offset, full-scale and linearity errors, the 
fastest settling time and minimum power consumption. 
However, unbuffered operation requires that appropriate 
loading be maintained on the V
OUT
 pin. The LTC2641/ 
LTC2642 V
OUT
 can be modeled as an ideal voltage source 
in series with a source resistance of R
OUT 
, typically 6.2k 
(Figure 4). The DAC’s linear output impedance allows it 
to drive medium loads (R
L
 > 60k) without degrading INL 
or DNL; only the gain error is increased. The gain error 
(GE) caused by a load resistance, R
L
, (relative to full 
scale) is: 
 
 
GE =
–1
1+
R
OUT
R
L
In 16-bit LSBs:
 
 
GE = –65536
1+
R
OUT
R
L
LSB


R
OUT
 has a low tempco (typically < ±50ppm/°C), and is 
independent of DAC code. The variation of R
OUT
, part-to-
part, is typically less than ±20%. 
Note on LSB units: 
For the following error descriptions, “LSB” means 16-bit 
LSB and 65,536 is rounded to 66k. 
To convert to 14-bit LSBs (LTC2641-14/LTC2642-14) 
divide by 4. 
To convert to 12-bit LSBs (LTC2641-12/LTC2642-12) 
divide by 16.
A constant current, I
L
, loading V
OUT
 will produce an 
offset of:
 V
OFFSET
 = –I
L
 • R
OUT
For V
REF
 = 2.5V, a 16-bit LSB equals 2.5V/65,536, or 38µV. 
Since R
OUT
 is 6.2k, an I
L
 of 6nA produces an offset of 
1LSB. Therefore, to avoid degrading DAC performance, 
it is critical to protect the V
OUT
 pin from any sources of 
leakage current. 
Unbuffered V
OUT
 Settling Time
The settling time at the V
OUT
 pin can be closely approxi-
mated by a single-pole response where: 
 
t = R
OUT
 • (C
OUT
 + C
L
)
(Figure 4). Settling to 1/2LSB at 16-bits requires about 12 
time constants (ln(2 • 65,536)). The typical settling time 
of 1µs corresponds to a time constant of 83ns, and a 
total (C
OUT
 + C
L
) of about 83ns/6.2k = 13pF . The internal 
capacitance, C
OUT
 is typically 10pF, so an external C
L
 of 
3pF corresponds to 1µs settling to 1/2LSB.
I
L
V
OUT
0V TO V
REF
R
OUT
V
OUT
C
OUT
LTC2641
LTC2642
V
REF
REF
GND
CODE
2
N
V
REF
( )
C
L
26412 F04
R
L
+
Figure 4. V
OUT
 Pin Equivalent Circuit
Op Amp Selection
The optimal choice for an external buffer op amp depends 
on whether the DAC is used in the unipolar or bipolar 
mode of operation, and also depends on the accuracy, 
speed, power dissipation and board area requirements of 
the application. The LTC2641/LTC2642’s combination of 
tiny package size, rail-to-rail single supply operation, low 
power dissipation, fast settling and nearly ideal accuracy 
specifications makes it impractical for one op amp type 
to fit every application.
In bipolar mode (LTC2642 only), the amplifier operates 
with the internal resistors to provide bipolar offset and 
scaling. In this case, a precision amplifier operating from 
dual power supplies, such as the the LT1678 provides the 
±V
REF
 output range (Figure 3). 
In unipolar mode, the output amplifier operates as a unity 
gain voltage follower. For unipolar, single supply applica-
tions a precision, rail-to-rail input, single supply op amp