STMicroelectronics LED815 Evaluation Boards EVALHVLED815W15 EVALHVLED815W15 Fiche De Données
Codes de produits
EVALHVLED815W15
Pin description and connection diagrams
HVLED815PF
8/36
Doc ID 023409 Rev 4
2.2 Thermal
data
3
VCC
Supply voltage of the device.
A capacitor, connected between this pin and ground, is initially charged by the
internal high-voltage startup generator; when the device is running, the same
generator keeps it charged in case the voltage supplied by the auxiliary winding
is not sufficient. This feature is disabled in case a protection is tripped. A small
bypass capacitor (100 nF typ.) to GND may be useful to get a clean bias voltage
for the signal part of the IC.
internal high-voltage startup generator; when the device is running, the same
generator keeps it charged in case the voltage supplied by the auxiliary winding
is not sufficient. This feature is disabled in case a protection is tripped. A small
bypass capacitor (100 nF typ.) to GND may be useful to get a clean bias voltage
for the signal part of the IC.
4
GND
Ground.
Current return for both the signal part of the IC and the gate drive. All of the
ground connections of the bias components should be tied to a trace going to this
pin and kept separate from any pulsed current return.
ground connections of the bias components should be tied to a trace going to this
pin and kept separate from any pulsed current return.
5
ILED
Constant current (CC) regulation loop reference voltage.
An external capacitor C
LED
is connected between this pin and GND. An internal
circuit develops a voltage on this capacitor that is used as the reference for the
MOSFET’s peak drain current during CC regulation. The voltage is automatically
adjusted to keep the average output current constant.
MOSFET’s peak drain current during CC regulation. The voltage is automatically
adjusted to keep the average output current constant.
6
DMG
Transformer demagnetization sensing for quasi-resonant operation and output
voltage monitor.
voltage monitor.
A negative-going edge triggers the MOSFET turn-on, to achieve quasi-resonant
operation (zero voltage switching).
operation (zero voltage switching).
The pin voltage is also sampled-and-held right at the end of transformer
demagnetization to get an accurate image of the output voltage to be fed to the
inverting input of the internal, transconductance-type, error amplifier, whose non-
inverting input is referenced to 2.5 V. The maximum I
demagnetization to get an accurate image of the output voltage to be fed to the
inverting input of the internal, transconductance-type, error amplifier, whose non-
inverting input is referenced to 2.5 V. The maximum I
DMG
sunk/sourced current
must not exceed ± 2 mA (AMR) in all the Vin range conditions.
No capacitor is allowed between the pin and the auxiliary transformer.
7
COMP
Output of the internal transconductance error amplifier. The compensation
network is placed between this pin and GND to achieve stability and good
dynamic performance of the voltage control loop.
network is placed between this pin and GND to achieve stability and good
dynamic performance of the voltage control loop.
8
N.a.
Not available. These pins must be connected to GND.
9-11
N.a.
Not available. These pins must be left not connected.
12
N.c.
Not internally connected. Provision for clearance on the PCB to meet safety
requirements.
requirements.
13 to
16
DRAIN
Drain connection of the internal power section.
The internal high-voltage startup generator sinks current from this pin as well.
Pins connected to the internal metal frame to facilitate heat dissipation.
Pins connected to the internal metal frame to facilitate heat dissipation.
Table 2.
Pin description (continued)
N.
Name
Function
Table 3.
Thermal data
Symbol
Parameter
Max. value
Unit
R
thJP
Thermal resistance, junction-to-pin
10
°C/W
R
thJA
Thermal resistance, junction-to-ambient
110
°C/W