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EVAL6460
Page de 139
L6460 Main 
switching 
regulator
Doc ID 17713 Rev 1
51/139
   
   
   
Figure 11.
Main switching regulator functional blocks
In pulse skipping control the duty cycle must be chosen by the user depending on supply 
voltage and output regulated voltage. Therefore the switching regulator has 4 possible duty 
cycles that can be changed by writing the VmainSwSelPWM bits in the MainSwCfg register 
according to following 
.
         
The output current is limited to a value that can be set by means of SelIlimit bit in the 
MainSwCfg register according to following 
         
         
Table 10.
Main switching regulator PWM specification
MainSwCfg register
Duty cycle value
Comments
VmainSwSelPWM[1:0]
Typical
00
12%
01
15%
10
26%
Default state
11
63.5%
Table 11.
Main switching regulator current limit
SelIlimit
Current limit (min)
Comments
0
3.3A
Default state
1
2.3A
 
La 
VSupply 
High Side 
Driver 
Control 
Logic 
Current Sense 
Charge pump Voltage
 
VSWmain_FB 
Voltage  
Loop Control 
Regulator Ref 
Under voltage 
Threshold 
Filter 
R
a
 
R
b
 
From Central Logic 
Regulator Freq 
To Central Logic 
Under voltage flag 
VSWmain_SW