STMicroelectronics Demonstration board using a dual full-bridge L6227Q EVAL6227QR EVAL6227QR Fiche De Données

 19/27

A typical application using L6227Q is shown in 

. Typical component values for the 

application are shown in 

. A high quality ceramic capacitor in the range of 100 to 

200 nF should be placed between the power pins (VS

A

 and VS

B

) and ground near the 

L6227Q to improve the high frequency filtering on the power supply and reduce high 
frequency transients generated by the switching. The capacitors connected from the EN

A

 

and EN

B

 inputs to ground set the shut down time for the bridge A and bridge B respectively 

when an over current is detected (see overcurrent protection). The two current sensing 
inputs (SENSE

A

 and SENSE

B

) should be connected to the sensing resistors with a trace 

length as short as possible in the layout. The sense resistors should be non-inductive 
resistors to minimize the dI/dt transients across the resistor. To increase noise immunity, 
unused logic pins (except EN

A

 and EN

B

) are best connected to 5 V (high logic level) or GND 

(low logic level) (see pin description). It is recommended to keep power ground and signal 
ground separated on PCB.

C

1

100 

µF

C

2

100 nF

C

A

1 nF

C

B

1 nF

C

BOOT

220 nF

C

P

10 nF

C

ENA

5.6 nF

C

ENB

5.6 nF

C

REFA

68 nF

C

REFB

68 nF

D

1

1N4148

D

2

1N4148

R

A

39 k

Ω

R

B

39 k

Ω

R

ENA

100 k

Ω

R

ENB

100 k

Ω

R

SENSEA

0.6 

Ω

R

SENSEB

0.6 

Ω