STMicroelectronics Double output SMPS for power line application using ALTAIR04-900 primary controller EVLALTAIR900-M1 EVLALTAIR900-M1 Fiche De Données
Codes de produits
EVLALTAIR900-M1
Application information
ALTAIR04-900
18/29
Doc ID 18211 Rev 2
Figure 16.
Feedforward compensation: internal schematic
The R
ZCD
resistor can be calculated as follows:
In this case the peak drain current does not depend on input voltage anymore.
One more consideration concerns the R
ZCD
value: during MOSFET’s ON-time, the current
sourced by the ZCD/FB pin, I
ZCD
, is compared with an internal reference current I
ZCDON
(-50
µA typical).
If I
ZCD
< I
ZCDON
, the brownout function is activated and the IC is shut-down.
This feature is especially important when the auxiliary winding is accidentally disconnected
and considerably increases the end-product’s safety and reliability.
and considerably increases the end-product’s safety and reliability.
5.7
Burst-mode operation at no load or very light load
When the voltage at the COMP pin falls 65 mV below a threshold fixed internally at a value,
V
V
COMPBM
, the IC is disabled with the MOSFET kept in OFF state and its consumption
reduced at a lower value to minimize Vcc capacitor discharge.
In this condition the converter operates in burst-mode (one pulse train every T
START
=500
µs), with minimum energy transfer.
As a result of the energy delivery stop, the output voltage decreases: after 500 µs the
controller switches-on the MOSFET again and the sampled voltage on the ZCD pin is
compared with the internal reference. If the voltage on the EA output, as a result of the
comparison, exceeds the V
controller switches-on the MOSFET again and the sampled voltage on the ZCD pin is
compared with the internal reference. If the voltage on the EA output, as a result of the
comparison, exceeds the V
COMPL
threshold, the device restarts switching, otherwise it stays
OFF for another 500 µs period.
In this way the converter works in burst-mode with a nearly constant peak current defined by
the internal disable level. Then a load decrease causes a frequency reduction, which can go
down even to few hundred hertz, thus minimizing all frequency-related losses and making it
easier to comply with energy saving regulations. This kind of operation, shown in the timing
the internal disable level. Then a load decrease causes a frequency reduction, which can go
down even to few hundred hertz, thus minimizing all frequency-related losses and making it
easier to comply with energy saving regulations. This kind of operation, shown in the timing
.
CC
Block
Aux
R zcd
R f b
I FF
Rsense
R f f
+
-
C C
F eedf orward
Logic
PWM
LOGI C
ZCD/FB
DRAIN
SOURCE
(4)
AUX
P
FF
ZCD
PRI
d
SENSE
N
L R
R
N
T R
⋅
=
⋅
⋅