Intel L2500 LE80539LF0342MX Manuel D’Utilisation
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Codes de produits
LE80539LF0342MX
Thermal Specifications and Design Considerations
88
Datasheet
The Intel Thermal Monitor controls the processor temperature by modulating (starting
and stopping) the processor core clocks or by initiating an Enhanced Intel SpeedStep
Technology transition when the processor silicon reaches its maximum operating
temperature. The Intel Thermal Monitor uses two modes to activate the TCC:
Automatic mode and on-demand mode. If both modes are activated, Automatic mode
takes precedence.
Note:
The Intel Thermal Monitor automatic mode must be enabled through BIOS for the
processor to be operating within specifications.
There are two automatic modes called Intel Thermal Monitor 1 (TM1) and Intel Thermal
Monitor 2 (TM2). These modes are selected by writing values to the Model Specific
Registers (MSRs) of the processor. After Automatic mode is enabled, the TCC will
activate only when the internal die temperature reaches the maximum allowed value
for operation.
Likewise, when Intel Thermal Monitor 2 is enabled, and a high temperature situation
exists, the processor will perform an Enhanced Intel SpeedStep Technology transition
to a lower operating point. When the processor temperature drops below the critical
level, the processor will make an Enhanced Intel SpeedStep Technology transition to
the last requested operating point.
TM1 and TM2 can co-exist within the processor. If both TM1 and TM2 bits are enabled in
the auto-throttle MSR, TM2 will take precedence over TM1. However, if TM2 is not
sufficient to cool the processor below the maximum operating temperature then TM1
will also activate to help cool down the processor. Intel recommends Intel Thermal
Monitor 1 and Intel Thermal Monitor 2 be enabled on the Intel Core Duo processor and
Intel Core Solo processor.
If a processor load-based Enhanced Intel SpeedStep Technology transition (through
MSR write) is initiated when an Intel Thermal Monitor 2 period is active, there are two
possible results:
1. If the processor load-based Enhanced Intel SpeedStep Technology transition target
frequency is higher than the Intel Thermal Monitor 2 transition-based target
frequency, the processor load-based transition will be deferred until the Intel
Thermal Monitor 2 event has been completed.
2. If the processor load-based Enhanced Intel SpeedStep Technology transition target
frequency is lower than the Intel Thermal Monitor 2 transition-based target
frequency, the processor will transition to the processor load-based Enhanced Intel
SpeedStep Technology target frequency point.
When Intel Thermal Monitor 1 is enabled while a high temperature situation exists, the
clocks will be modulated by alternately turning the clocks off and on at a 50% duty
cycle. Cycle times are processor speed dependent and will decrease linearly as
processor core frequencies increase. Once the temperature has returned to a non-
critical level, modulation ceases and TCC goes inactive. A small amount of hysteresis
has been included to prevent rapid active/inactive transitions of the TCC when the
processor temperature is near the trip point. The duty cycle is factory configured and
cannot be modified. Also, automatic mode does not require any additional hardware,
software drivers, or interrupt handling routines. Processor performance will be
decreased by the same amount as the duty cycle when the TCC is active.
The TCC may also be activated via on-demand mode. If bit 4 of the ACPI Intel Thermal
Monitor control register is written to a 1, the TCC will be activated immediately,
independent of the processor temperature. When using on-demand mode to activate
the TCC, the duty cycle of the clock modulation is programmable via bits 3:1 of the
same ACPI Intel Thermal Monitor control register. In automatic mode, the duty cycle is
fixed at 50% on, 50% off, however in on-demand mode, the duty cycle can be
programmed from 12.5% on/ 87.5% off, to 87.5% on/12.5% off in 12.5% increments.
On-demand mode may be used at the same time automatic mode is enabled, however,