Intel ULV 353 LE80536VC900512 Fiche De Données
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Codes de produits
LE80536VC900512
Mobile Intel
®
Celeron
®
Processor (0.18µ) in BGA2 and Micro-PGA2 Packages
Datasheet
283654-003
42
Table 24. GTL+ Signal Group Ringback Specification
Symbol Parameter
Min
Unit Figure Notes
α
Overshoot 100
Notes 1, 2
τ
Minimum Time at High
0.5
ns
Notes 1, 2
ρ
Amplitude of Ringback
-200
mV
Notes 1, 2, 3
φ
Final Settling Voltage
200
mV
Notes 1, 2
δ
Duration of Sequential Ringback
N/A
ns
Notes 1, 2
NOTES:
1.
Specified for the edge rate of 0.3 – 0.8 V/ns. See Figure 16 for the generic waveform.
2.
All values determined by design/characterization.
3.
Ringback below V
REF,max
+ 200 mV is not authorized during low to high transitions. Ringback above
V
REF,min
– 200 mV is not authorized during high to low transitions.
Figure 16. Low to High, GTL+ Receiver Ringback Tolerance
V
REF,max
+0.2V
Time
τ
δ
ρ
φ
α
V
REF,min
-0.2V
V
REF,max
V
start
Clock
V
IL,BCLK
V
IH,BCLK
V0014-01