Intel E3815 FH8065301567411 Fiche De Données
Codes de produits
FH8065301567411
Intel
®
Atom™ Processor E3800 Product Family
926
Datasheet
25:24
01b
RO
PIPE_SELECT:
Plane B always ties to Pipe B.
Reserved
AccessType: Read Only
23
0b
RW
KEY_WINDOW_ENABLE:
This applies only to devices with a Display Plane C. It
determines what area of the screen the source key compare should be applied. This bit
is set to one when the color key is used as a destination key for display C. Display plane
C must be enabled on the same pipe and display A should not be enabled on this pipe
for this to be used. The function is only effective when display C is enabled and defined
by Z-order to be behind display B.
0 = If keying is enabled, it applies to the entire display B plane
1 = If keying is enabled, it applies only to the intersection between display B and display
C
[DevBLC] and [DevCTG]: Reserved
22
0b
RW
SOURCE_KEY_ENABLE:
When used as a sprite or a secondary this enables source
color keying. Sprite pixel values that match the key will become transparent. Source
keying allows a plane that is behind (below) this plane to show through where the
display B data matches the display B key. This function is overloaded to provide display
C destination keying when combined with the key window enable bit.. Setting this bit is
not allowed when the display pixel format includes an alpha channel.
0 = Sprite source key is disabled (default)
1 = Sprite source key is enabled.
[DevBLC] and [DevCTG]: Reserved
In destination keying, primary plane pixel will be made transparent when blending with
sprite pixel as the destination if the primary src key matches with the primary pixel
value.
21:20
0b
RW
PIXEL_MULTIPLY:
This cause the display plane to duplicate lines and pixels sent to
the assigned pipe. In the line/pixel doubling mode, the horizontal pixels are doubled and
lines are sent twice. Asynchronous flips are not used in this mode.
Programming Notes:
Asynchronous flips are not permitted when pixel multiply is enabled.
00 = No duplication
01 = Line/pixel Doubling
10 = Reserved
11 = Pixel Doubling only
19:16
0b
RW
RESERVED:
Write as zero
15
0b
RW
_180DISPLAY_ROTATION:
This mode causes the display plane to be rotated 180 . In
addition to setting this bit, software must also set the base address to the lower right
corner of the unrotated image.
[DevCL] Do not enable 180 rotation together with Frame Buffer Compression
0 = No rotation
1 = 180 rotation
14
0b
RW
RESERVED_1:
[DevBW, DevCL, DevCDV]
[DevBLC, DevCTG] Display B Trickle Feed Enable:
0 = Trickle Feed Enabled - Display B data requests are sent whenever there is space in
the Display Data Buffer.
1 = Trickle Feed Disabled - Display B data requests are sent in bursts.
Note: On mobile products this bit will be ignored such that Trickle Feed is always
disabled.
[DevELK] Must always be programmed disabled
13
0b
RW
RESERVED_2:
[DevBW, DevCL, DevCDV]
[DevBLC, DevCTG] Display B Data Buffer Partitioning Control:
0 = Display B Data Buffer will encompass Sprite B buffer space when Sprite B is
disabled.
1 = Display B Data Buffer will not use Sprite B buffer space when Sprite B is disabled.
Note: When in C3xR Max FIFO mode, this bit will be ignored.
12:11
0b
RW
RESERVED_3:
Reserved.
Bit
Range
Default &
Access
Field Name (ID): Description