Konica Minolta Computer Hardware PCI-1712 Manuel D’Utilisation
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APPENDIX D
PCI-1712/1712L User’s Manual
Advantech Co., Ltd.
www.advantech.com
www.advantech.com
D. 9 Interrupt and FIFO status
—
Read BASE+8
Table D-9: Register for interrupt and FIFO status
INT_F
Interrupt flag
This bit indicates whether interrupt occurred or not.
This bit indicates whether interrupt occurred or not.
1 means that an interrupt has occurred.
A/D_F/E
A/D FIFO empty flag
This bit indicates the A/D FIFO empty status
This bit indicates the A/D FIFO empty status
1 means A/D FIFO empty.
A/D_F/H
A/D FIFO half-full flag
This bit indicates the A/D FIFO half-full status
This bit indicates the A/D FIFO half-full status
1 means A/D FIFO halt-full.
A/D_F/F
A/D FIFO full flag
This bit indicates the A/D FIFO full status
This bit indicates the A/D FIFO full status
1 means A/D FIFO full.
D/A_F/E
D/A FIFO empty flag
This bit indicates the D/A FIFO empty status
This bit indicates the D/A FIFO empty status
1 means D/A FIFO empty.
D/A_F/H
D/A FIFO half-full flag
This bit indicates the D/A FIFO half-full status
This bit indicates the D/A FIFO half-full status
1 means D/A FIFO halt-full.
D/A_F/F
D/A FIFO full flag
This bit indicates the D/A FIFO full status
This bit indicates the D/A FIFO full status
1 means D/A FIFO full.
.
d
d
A
e
s
a
B
5
1
4
1
3
1
2
1
1
1
0
1
9
8
7
6
5
4
3
2
1
0
8
R
s
u
t
a
t
s
O
F
I
F
d
n
a
t
p
u
r
r
e
t
n
I
_
A
/
D
F
/
F
_
A
/
D
H
/
F
_
A
/
D
E
/
F
_
D
/
A
F
/
F
_
D
/
A
H
/
F
_
D
/
A
E
/
F
_
T
N
I
F
F