Renesas R5S72641 Manuel D’Utilisation
Section 10 Direct Memory Access Controller
Page 404 of 2108
R01UH0134EJ0400 Rev. 4.00
Sep
24,
2014
SH7262 Group, SH7264 Group
DMARS6
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
Initial value:
R/W:
CH13 MID[5:0]
CH13 RID[1:0]
CH12 RID[1:0]
CH12 MID[5:0]
DMARS7
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
Initial value:
R/W:
CH15 MID[5:0]
CH15 RID[1:0]
CH14 RID[1:0]
CH14 MID[5:0]
Transfer requests from the various modules specify MID and RID as shown in table 10.3.
Table 10.3 DMARS Settings
Peripheral Module
Setting Value for One
Channel ({MID, RID})
Channel ({MID, RID})
MID RID Function
USB 2.0 host/function
module
module
H'03 B'000000
B'11
Channel
0
FIFO
H'07 B'000001
B'11
Channel
1
FIFO
Renesas SPDIF
interface
interface
H'09 B'000010
B'01
Transmit
H'0A B'000010
B'10
Receive
SD host interface
H'11
B'000100 B'01
SD_BUF
write
H'12
B'10
SD_BUF
read
Clock synchronous
serial I/O with FIFO
serial I/O with FIFO
H'19 B'000110
B'01
Transmit
H'1A
B'10
Receive
Serial sound interface
Channel 0
Channel 0
H'21 B'001000
B'01
Transmit
H'22
B'10
Receive
Serial sound interface
Channel 1
Channel 1
H'27 B'001001
B'11
Serial sound interface
Channel 2
Channel 2
H'2B B'001010
B'11