IBM 8260 Manuel D’Utilisation
8.4 Jitter Attenuator Daughter Card (JADC)
The JADC can be mounted on any 8260 token-ring module and contains a DPLL
function. It must be installed on a module under the following circumstances:
function. It must be installed on a module under the following circumstances:
1. Your 18-port active module is configured with ports 17 and 18 acting as
RI/RO ports and these ports are connected to a non-8260 hub.
2. The fiber ports on the dual-fiber repeater module are connected to a
non-8260 hub.
Note:
The dual-fiber repeater module provides two sets of RI/RO pairs and
you must install one JADC for each pair which is connected to a non-8260
hub. This module has the ability to accommodate two JADCs.
hub. This module has the ability to accommodate two JADCs.
3. The 20-port passive module must always have a JADC. In fact, this module
is shipped from the factory with the JADC already installed and must never
be removed.
be removed.
The DPLL on the Jitter Attenuator Daughter Card is similar to the DPLL
implemented on each port of the 8260 active token-ring modules. The only
difference is that the Jitter Attenuator Daughter Card has to cope with a higher
amount of jitter which may be accumulated by up to 20 stations that may attach
to the passive module or a high number of stations attached to the non-8260
hubs. The size of the buffer used in the Jitter Attenuator Daughter Card is
64-bits as opposed to the 8-bit buffer which is used in the DPLLs implemented on
the active modules. Figure 86 shows the components of the DPLL implemented
on the 8260 Jitter Attenuator Daughter Card.
implemented on each port of the 8260 active token-ring modules. The only
difference is that the Jitter Attenuator Daughter Card has to cope with a higher
amount of jitter which may be accumulated by up to 20 stations that may attach
to the passive module or a high number of stations attached to the non-8260
hubs. The size of the buffer used in the Jitter Attenuator Daughter Card is
64-bits as opposed to the 8-bit buffer which is used in the DPLLs implemented on
the active modules. Figure 86 shows the components of the DPLL implemented
on the 8260 Jitter Attenuator Daughter Card.
Figure 86. Components of DPLL I m p l e m e n t e d o n JADC
The DPLL of JADC on the passive module is located after the last port. The
wideband PLL accepts signals from the last port, whereas the narrowband PLL
takes the signal from the wideband PLL and transmits it out toward the
backplane. In addition to the JADC, there is a DPLL module physically on the
passive module whose narrowband side resides between the backplane and port
1, and its wideband side resides between the JADC and the backplane.
wideband PLL accepts signals from the last port, whereas the narrowband PLL
takes the signal from the wideband PLL and transmits it out toward the
backplane. In addition to the JADC, there is a DPLL module physically on the
passive module whose narrowband side resides between the backplane and port
1, and its wideband side resides between the JADC and the backplane.
When a JADC is installed on an active module, the JADC is always positioned as
a single unit (wideband and narrowband components) between the last trunk
port and the backplane. In addition, the DPLL which is always present at each
trunk port is changed from a narrowband/wideband configuration to a
a single unit (wideband and narrowband components) between the last trunk
port and the backplane. In addition, the DPLL which is always present at each
trunk port is changed from a narrowband/wideband configuration to a
Chapter 8. 8260 Token-Ring Support
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