Epson 6200A Manuel D’Utilisation
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
MSB
LSB
MSB
LSB
C –
Z –
D –
I –
C –
Z –
D –
I –
S1C6200/6200A CORE CPU MANUAL
EPSON
29
3 INSTRUCTION SET
ADC r,i
Add with carry immediate data i to r-register
ADC r,q
Add with carry q-register to r-register
ADC r,i
r
←
r + i
3
to i
0
+ C
1
1
0
0
0
1
r
1
r
0
i
3
i
2
i
1
i
0
C40H to C7FH
II
7
Set if a carry is generated; otherwise, reset.
Set if the result is zero; otherwise, reset.
Not affected
Not affected
Set if the result is zero; otherwise, reset.
Not affected
Not affected
Adds the carry bit and immediate data i to the r-register.
ADC MX,3
ADC B,7
Memory (MX)
0100
1000
1000
B register
1001
1001
0000
C flag
1
0
1
Z flag
1
0
1
ADC r,q
r
←
r + q + C
1
0
1
0
1
0
0
1 r
1
r
0
q
1
q
0
A90H to A9FH
IV
7
Set if a carry is generated; otherwise, reset.
Set if the result is zero; otherwise, reset.
Not affected
Not affected
Set if the result is zero; otherwise, reset.
Not affected
Not affected
Adds the carry bit and the contents of the q-register to the r-register.
ADC MY,A
ADC MX,B
A register
0101
0101
0101
B register
0001
0001
0001
Memory (MX)
0111
0111
1001
Memory (MY)
1011
0001
0001
C flag
1
1
0
Z flag
0
0
0