Fujitsu mb91192 Manuel D’Utilisation
59
3.12
Clock Generation Section (Low Power Consumption
Mechanism)
Mechanism)
The clock generation section is the modules that have the following functions:
• CPU clock generation (including the gear function)
• Peripheral clock generation (including the gear function)
• Reset generation and cause retention
• Standby function
• Built-in PLL (duty correction circuit)
■
Register in Clock Generation Section
Figure 3.12-1 Register in Clock Generation Section
RSRR/WTCR
Reset Factor/Watchdog Cycle Control Register
STCR
Standby Control Register
Reserve
(Access interdiction)
CTBR
Timebase Timer Clear Register
GCR
Gear Control Register
WPR
Watchdog Reset Generation Dalayed Register
1
7
bit
Address: 000480
H
000481
H
000482
H
000483
H
000484
H
000485
H