Silicon Laboratories C8051F344 Manuel D’Utilisation

Page de 282
C8051F340/1/2/3/4/5/6/7
256
Rev. 0.5
SFR Definition 21.9. TMR2RLL: Timer 2 Reload Register Low Byte
SFR Definition 21.10. TMR2RLH: Timer 2 Reload Register High Byte
SFR Definition 21.11. TMR2L: Timer 2 Low Byte
SFR Definition 21.12. TMR2H Timer 2 High Byte
Bits 7–0: TMR2RLL: Timer 2 Reload Register Low Byte. 
TMR2RLL holds the low byte of the reload value for Timer 2 when operating in auto-reload 
mode, or the captured value of the TMR2L register in capture mode.
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address:
0xCA
Bits 7–0: TMR2RLH: Timer 2 Reload Register High Byte. 
The TMR2RLH holds the high byte of the reload value for Timer 2 when operating in 
auto-reload mode, or the captured value of the TMR2H register in capture mode.
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address:
0xCB
Bits 7–0: TMR2L: Timer 2 Low Byte.
In 16-bit mode, the TMR2L register contains the low byte of the 16-bit Timer 2. In 8-bit mode, 
TMR2L contains the 8-bit low byte timer value.
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address:
0xCC
Bits 7–0: TMR2H: Timer 2 High Byte.
In 16-bit mode, the TMR2H register contains the high byte of the 16-bit Timer 2. In 8-bit 
mode, TMR2H contains the 8-bit high byte timer value.
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address:
0xCD