Manuels d'utilisation pour Cypress CY7C1525KV18

Table des matières

• Features

  1
• Configurations

  1
• Functional Description

  1
• Logic Block Diagram (CY7C1510KV18)

  2
• Logic Block Diagram (CY7C1525KV18)

  2
• Logic Block Diagram (CY7C1512KV18)

  3
• Logic Block Diagram (CY7C1514KV18)

  3
• Pin Configuration

  4
  • 165-Ball FBGA (13 x 15 x 1.4 mm) Pinout

    4
• Pin Definitions

  6
• Functional Overview

  8
  • Read Operations

    8
  • Write Operations

    8
  • Byte Write Operations

    8
  • Single Clock Mode

    8
  • Concurrent Transactions

    8
  • Depth Expansion

    8
  • Programmable Impedance

    8
  • Echo Clocks

    9
  • PLL

    9
• Application Example

  9
• Truth Table

  10
• Write Cycle Descriptions

  10
• Write Cycle Descriptions

  11
• Write Cycle Descriptions

  11
• IEEE 1149.1 Serial Boundary Scan (JTAG)

  12
  • Disabling the JTAG Feature

    12
  • Test Access Port-Test Clock

    12
  • Test Mode Select (TMS)

    12
  • Test Data-In (TDI)

    12
  • Test Data-Out (TDO)

    12
  • Performing a TAP Reset

    12
  • TAP Registers

    12
    • Instruction Register

      12
    • Bypass Register

      12
    • Boundary Scan Register

      12
    • Identification (ID) Register

      12
  • TAP Instruction Set

    12
    • IDCODE

      13
    • SAMPLE Z

      13
    • SAMPLE/PRELOAD

      13
    • BYPASS

      13
    • EXTEST

      13
    • EXTEST OUTPUT BUS TRISTATE

      13
    • Reserved

      13
• TAP Controller State Diagram

  14
• TAP Controller Block Diagram

  15
• TAP Electrical Characteristics

  15
• TAP AC Switching Characteristics

  16
• TAP Timing and Test Conditions

  16
• Identification Register Definitions

  17
• Scan Register Sizes

  17
• Instruction Codes

  17
• Boundary Scan Order

  18
• Power Up Sequence in QDR-II SRAM

  19
  • Power Up Sequence

    19
  • PLL Constraints

    19
• Maximum Ratings

  20
• Operating Range

  20
• Electrical Characteristics

  20
  • DC Electrical Characteristics

    20
  • AC Electrical Characteristics

    21
• Capacitance

  22
• Thermal Resistance

  22
• Switching Characteristics

  23
• Switching Waveforms

  25
• Ordering Information

  26
• Package Diagram

  29
• Document History Page

  30
• Sales, Solutions, and Legal Information

  30
  • Worldwide Sales and Design Support

    30
  • Products

    30
  • PSoC Solutions

    30