Manuels d'utilisation pour Cypress SL811HS

Table des matières

• Features

  1
• Introduction

  1
  • Data Port, Microprocessor Interface

    2
  • DMA Controller (slave mode only)

    2
  • Interrupt Controller

    2
  • Buffer Memory

    2
    • Auto Address Increment Mode

      2
  • PLL Clock Generator

    3
    • Typical Crystal Requirements

      3
  • USB Transceiver

    3
• SL811HS Registers

  3
  • SL811HS Master (Host) Mode Registers

    4
    • Register Values on Power Up and Reset

      4
    • USB Control Registers

      4
    • SL811HS Control Registers

      7
  • SL811HS Slave Mode Registers

    12
    • Endpoint Registers

      12
    • Endpoints 0-3 Register Addresses

      12
    • Endpoint Control Registers

      13
    • USB Control Registers

      14
• Physical Connections

  18
  • 28-Pin PLCC Physical Connections

    18
    • 28-Pin PLCC Pin Layout

      18
    • 28-Pin PLCC Mechanical Dimensions

      18
    • Package Markings (28-pin PLCC)

      19
  • 48-Pin TQFP Physical Connections

    20
    • 48-Pin TQFP AXC Pin Layout

      20
    • 48-Pin TQFP Mechanical Dimensions

      20
    • 48/28-Pin USB Host Controller Pins Description

      21
    • Package Markings (48-Pin TQFP)

      23
• Electrical Specifications

  24
  • Absolute Maximum Ratings

    24
  • Recommended Operating Condition

    24
  • External Clock Input Characteristics (X1)

    24
  • DC Characteristics

    25
  • USB Host Transceiver Characteristics

    25
  • Bus Interface Timing Requirements

    26
    • I/O Write Cycle

      26
    • I/O Read Cycle

      27
    • DMA Write Cycle

      28
    • DMA Read Cycle

      29
    • Reset Timing

      29
    • Clock Timing Specifications

      30
• Ordering Information

  30
• Package Diagrams

  30