Manuels d'utilisation pour GatesAir Inc. CZF

Table des matières

• Table of Contents

  11
• List of Figures

  17
• List of Tables

  21
• 1 Introduction

  23
  • 1.1 Organization of Technical Manual

    23
  • 1.2 General Description

    23
  • 1.3 Physical Description

    24
  • 1.4 Technical Overview

    26
  • 1.5 Specifications

    26
• 2 Installation

  29
  • 2.1 Introduction

    29
  • 2.2 Installing Exciters Removed for Shipment

    29
  • 2.3 Signal Connections

    29
    • 2.3.1 AC Power

      30
  • 2.4 Installation of the GPS 1PPS Signal

    30
  • 2.5 Retrofitting Into Existing Transmitter System

    31
    • 2.5.1 Feedback Requirements

      31
      • 2.5.1.1 Feedback Signal Quality Requirements

        32
    • 2.5.2 Typical Transmitter Systems Block Diagrams

      32
    • 2.5.3 Atlas Mobile Transmitters

      33
      • 2.5.3.1 Atlas Mobile Transmitter - 1 PA Cabinet, 2 Exciters

        33
      • 2.5.3.2 Atlas Mobile Transmitter - 2 or More PA Cabinets

        34
  • 2.6 Configuring the Exciter

    35
    • 2.6.1 Configuration of Setup Screens

      35
    • 2.6.2 Configuration of Status Screens

      37
    • 2.6.3 Normal Settings for Diagnostic Screens

      38
  • 2.7 Materials Needed

    39
• 3 Navigating the LCD Display Screens

  41
  • 3.1 Basic Operating Procedure

    41
    • 3.1.1 Raising or Lowering Output Power

      41
    • 3.1.2 Exciter Fault Display - Red

      41
      • 3.1.2.1 Fault Warning - Yellow

        41
  • 3.2 Starting Point: The Main LCD Touch Screen

    42
    • 3.2.1 Spectrum Response Screen

      43
    • 3.2.2 Exciter Status Series of Screens

      43
    • 3.2.3 Exciter Setup Series of Screens

      43
    • 3.2.4 FLO Measure Soft Key

      44
  • 3.3 LCD Display Flow Chart

    44
  • 3.4 Details of the Exciter Status Screens

    48
    • 3.4.1 System Status Screen

      48
    • 3.4.2 Transport Stream Status Screen

      49
    • 3.4.3 Adaptive Processing Board Status Screen

      49
      • 3.4.3.1 Adaptive Processing Diagnostics

        51
    • 3.4.4 Digital Processing Screens

      52
      • 3.4.4.1 Modulator Board Status, Screen 1/2

        52
      • 3.4.4.2 ADC and DAC Boards Status, Screen 2/2

        53
      • 3.4.4.3 FLO FPGA Status, Summary, Screen 1/5

        54
      • 3.4.4.4 FLO FPGA, GPS & Clock Status, Screen 2/5

        55
      • 3.4.4.5 FLO FPGA, Transport Stream Status, Screen 3/5

        56
      • 3.4.4.6 FLO FPGA, SFN FIFO Status, Screen 4/5

        57
      • 3.4.4.7 FLO FPGA, MTI Status, Screen 5/5

        58
    • 3.4.5 IF & RF Processing Status Screens

      59
      • 3.4.5.1 UDC Interface Board Status, Screen 1/4

        59
      • 3.4.5.2 PLL Board Status Screen

        60
        • 3.4.5.2.1 PLL Diagnostics

          61
      • 3.4.5.3 Up Converter Board Status Screen

        61
        • 3.4.5.3.1 Up Converter Diagnostics

          62
      • 3.4.5.4 Down Converter Board Status Screen

        63
        • 3.4.5.4.1 Down Converter Diagnostics

          64
    • 3.4.6 System Control Status Screens

      65
      • 3.4.6.1 Controller Board Status Screen

        66
        • 3.4.6.1.1 Controller Board Diagnostics

          66
      • 3.4.6.2 External I/O Board Status Screen

        67
        • 3.4.6.2.1 External I/O Diagnostics

          68
      • 3.4.6.3 CAN Bus Status Screen

        70
        • 3.4.6.3.1 CAN Diagnostics

          70
      • 3.4.6.4 Front Panel Board Status Screen

        70
      • 3.4.6.5 GPS Status Screen

        71
  • 3.5 Built In Tests

    72
  • 3.6 Details of the System Setup Screens

    72
    • 3.6.1 Restore Defaults Operation

      73
    • 3.6.2 Exciter Setup Screen

      75
      • 3.6.2.1 Power Calibration

        78
    • 3.6.3 RTAC Setup Screen

      78
      • 3.6.3.1 Filter Type

        80
      • 3.6.3.2 Max Peak Stretch

        80
      • 3.6.3.3 RTAC Power On Mode

        80
      • 3.6.3.4 RTAC Off Air Mode

        81
    • 3.6.4 Display Setup Screen

      81
    • 3.6.5 External I/O Setup Screen

      82
      • 3.6.5.1 VSWR Foldback Parameters

        83
      • 3.6.5.2 RF Present Cutoff

        83
      • 3.6.5.3 External I/O Interface to Transmitter Control Logic

        84
    • 3.6.6 Serial I/O Setup Screens

      85
      • 3.6.6.1 Serial Setup Screen 1 of 3, RS-232

        85
      • 3.6.6.2 Serial Setup Screen 2 of 3, Ethernet

        86
      • 3.6.6.3 Serial Setup Screen 3 of 3, CAN

        87
    • 3.6.7 FPGA Setup

      88
      • 3.6.7.1 FPGA Configure 1/5

        88
      • 3.6.7.2 FPGA Configure 2/5

        89
      • 3.6.7.3 FPGA Configure 3/5

        90
      • 3.6.7.4 FPGA Configure 4/5

        91
      • 3.6.7.5 FPGA Configure 5/5, Restore Defaults

        92
    • 3.6.8 Change Passwords > Security Setup

      93
      • 3.6.8.1 User Setup (Locked or Unlocked)

        94
      • 3.6.8.2 Diagnostics Setup (Locked or Unlocked)

        94
      • 3.6.8.3 Factory Setup (Locked or Unlocked)

        95
    • 3.6.9 Restore Defaults

      95
  • 3.7 RTAC Operating Procedures, Main Screen.

    95
    • 3.7.1 From RTAC Section of Main Screen

      95
    • 3.7.2 From Adaptive Precorrection Board Status Screen

      96
    • 3.7.3 From Down Converter Board Status Screen

      96
    • 3.7.4 From Down Converter Diagnostics Screen

      96
    • 3.7.5 From RTAC Setup Screen

      97
• 4 Theory of Operation

  99
  • 4.1 General Description

    99
  • 4.2 Transmitter Systems Block Diagram

    99
  • 4.3 APEX Exciter Digital Assembly Overview

    100
    • 4.3.1 Controller Board Theory

      101
    • 4.3.2 RTAC and Adaptive Precorrector Board Theory

      103
      • 4.3.2.1 44.4 MHz Phase Lock Loop

        104
    • 4.3.3 Exciter Output Spectral Response, RTAC Bypassed

      104
  • 4.4 APEX Exciter Analog Assembly Overview

    105
    • 4.4.1 Up Converter Board Block Diagram Description

      106
      • 4.4.1.1 Up Converter Board UHF/VHF Band Pass Filter

        106
    • 4.4.2 Down Converter Board Block Diagram Description

      107
    • 4.4.3 PLL Board - A4

      108
      • 4.4.3.1 10 MHz Reference

        108
      • 4.4.3.2 128.9 MHz IF PLL (First L. O.)

        109
      • 4.4.3.3 Main Phase Lock Loop (Second LO)

        110
    • 4.4.4 Output Amplifier

      111
  • 4.5 DC Power Distribution

    112
    • 4.5.1 Main Power Supply

      112
    • 4.5.2 Digital Deck Power

      112
      • 4.5.2.1 Controller Board Power

        112
      • 4.5.2.2 FPGA Modulator Board Power

        113
      • 4.5.2.3 Adaptive Processing Board Power

        113
      • 4.5.2.4 Power for DAC and ADC Boards

        113
      • 4.5.2.5 External I/O Board Power

        114
      • 4.5.2.6 Front Panel Board

        114
    • 4.5.3 Analog Deck Power

      114
      • 4.5.3.1 UDC Interface Board Power

        114
      • 4.5.3.2 Exciter Cooling Fan Power

        114
      • 4.5.3.3 Down Converter Board Power

        115
      • 4.5.3.4 PLL Board Power

        115
      • 4.5.3.5 Up Converter Board Power

        116
      • 4.5.3.6 Output Amplifier

        116
• 5 Maintenance and Troubleshooting

  117
  • 5.1 Exciter Maintenance

    117
    • 5.1.1 Cleaning

      117
    • 5.1.2 Measuring PLL Board Frequencies

      122
      • 5.1.2.1 Measuring Center Channel Frequency

        122
      • 5.1.2.2 PLL Board 10 MHz Reference Oscillator Frequency

        124
      • 5.1.2.3 Measuring the 1st Local Oscillator Frequency

        124
      • 5.1.2.4 Measuring the 2nd Local Oscillator Frequency

        124
  • 5.2 Loading Software

    125
  • 5.3 Default Settings For DIagnostics Screens

    126
  • 5.4 Typical Settings for the More Critical Exciter Setups

    127
  • 5.5 Exciter Troubleshooting Flow Charts

    128
  • 5.6 General Troubleshooting

    132
    • 5.6.1 Troubleshooting Tips

      132
  • 5.7 System Troubleshooting

    133
    • 5.7.1 PA, HPF, or ADC Adaptive Processing Faults

      133
    • 5.7.2 Transmitter Response Not Conforming to Mask Requirements

      133
    • 5.7.3 Checking Transmitter Spectrum

      134
    • 5.7.4 ASI Transport Stream Faults

      134
  • 5.8 Exciter Troubleshooting

    135
    • 5.8.1 Frequency Error

      135
    • 5.8.2 Dark Screen

      135
    • 5.8.3 Power Supply Voltages

      136
    • 5.8.4 Troubleshooting Down to the Board Level

      137
      • 5.8.4.1 Digital Tray Transmission Data Path

        137
      • 5.8.4.2 Analog Tray Signal Path

        137
    • 5.8.5 Isolating Problem to the Analog or Digital Tray

      137
      • 5.8.5.1 Checking Operation of the Entire Digital Tray

        137
      • 5.8.5.2 Checking Operation of the Entire Exciter

        138
    • 5.8.6 Isolating a Faulty Board in the Digital Tray

      139
      • 5.8.6.1 Modulator Board

        139
      • 5.8.6.2 Adaptive Precorrector Board

        140
      • 5.8.6.3 ADC and DAC Boards

        140
      • 5.8.6.4 Front Panel Board

        140
      • 5.8.6.5 Controller Board

        140
    • 5.8.7 Analog Tray Troubleshooting

      141
• 6 Parts List

  143
• Appendix A Exciter GUI Screen Captures

  145