Manuels d'utilisation pour Omega Vehicle Security OME-PIO-D56

Table des matières

• 2.2 I/O Port Location

  42
• 2.3 Enabling I/O Operation

  42
  • 2.3.1 DI/DO Port Architecture (CON3)

    42
  • 2.4 Interrupt Operation

    43
    • 2.4.3 Initial_high, active_low Interrupt source

      44
    • 2.5.5 OME-DB-24PD Isolated Input Board

      46
    • 2.5.8 Daughter Board Comparison Table

      47
• 3. I/O Control Register

  48
  • 3.1 How to Find the I/O Address

    48
  • 3.2 The Assignment of I/O Address

    49
    • 3.3.4 INT Mask Control Register

      50
    • 3.3.5 Aux Status Register

      50
  • 4.1 PIO_PISO

    1
    • 4.1.1 PIO_PISO.EXE for Windows

      1
  • 4.3 DEMO2

    1
  • 4.4 DEMO3

    1
  • 4.5 DEMO4

    1
  • 1. Introduction

    5
    • 1.1 Features

      5
    • 1.2 Specifications

      6
    • 1.3 Order Description

      6
      • 1.3.1 Options

        6
    • 1.4 PCI Data Acquisition Family

      7
    • 1.5 Product Checklist

      7
  • 2. Hardware configuration

    8
    • 2.1 Board Layout

      8
    • 2.2 I/O Port Location

      9
    • 2.3 Enabling I/O Operation

      9
      • 2.3.1 DI/DO Port Architecture (CON3)

        9
      • 2.3.2 DI Port Architecture (CON2)

        11
      • 2.3.3 DO Port Architecture (CON1)

        12
    • 2.4 Interrupt Operation

      13
      • 2.4.1 Interrupt Block Diagram of OME-PIO-D56/D24

        14
      • 2.4.2 INT_CHAN_0/1/2/3

        15
      • 2.4.3 Initial_high, active_low Interrupt source

        16
      • 2.4.4 Initial_low, active_high Interrupt source

        17
      • 2.4.5 Muliti-Interrupt Source

        18
    • 2.5 Daughter Boards

      20
      • 2.5.1 OME-DB-37

        20
      • 2.5.2 OME-DN-37

        20
      • 2.5.3 OME-DB-8125

        20
      • 2.5.4 OME-ADP-20/PCI

        21
      • 2.5.5 OME-DB-24PD Isolated Input Board

        22
      • 2.5.6 OME-DB-24RD Relay Board

        23
      • 2.5.7 OME-DB-24PRD, OME-DB-24POR, OME-DB-24C

        24
      • 2.5.8 Daughter Board Comparison Table

        25
    • 2.6 Pin Assignment

      26
  • 3. I/O Control Register

    28
    • 3.1 How to Find the I/O Address

      28
      • 3.1.1 PIO_DriverInit

        29
      • 3.1.2 PIO_GetConfigAddressSpace

        32
      • 3.1.3 Show_PIO_PISO

        33
    • 3.2 The Assignment of I/O Address

      34
    • 3.3 The I/O Address Map

      35
      • 3.3.1 RESET\ Control Register

        36
      • 3.3.2 AUX Control Register

        36
      • 3.3.3 AUX data Register

        36
      • 3.3.4 INT Mask Control Register

        37
      • 3.3.5 Aux Status Register

        37
      • 3.3.6 Interrupt Polarity Control Register

        38
      • 3.3.7 I/O Selection Control Register

        38
      • 3.3.8 Read/Write 8-bit data Register

        39
  • 4. Demo program

    40
    • 4.1 PIO_PISO

      41
      • 4.1.1 PIO_PISO.EXE for Windows

        42
    • 4.2 DEMO1

      43
    • 4.3 DEMO2

      44
    • 4.4 DEMO3

      45
    • 4.5 DEMO4

      47
    • 4.6 DEMO5

      49