Manuels d'utilisation pour STMicroelectronics STLDC08 Demo Board STEVAL-ILL039V1/2 STEVAL-ILL039V2

Table des matières

• Table 1. Device summary

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• 1 Application diagram

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  • Figure 1. Electric schematic optimized for 2 LEDs and ILED = 200 mA

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  • Table 2. List of components

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  • Figure 2. Electric schematic optimized for 4 LEDs and ILED = 300 mA

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  • Table 3. List of components

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• 2 Absolute maximum ratings

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  • Table 4. Absolute maximum ratings

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  • Table 5. Thermal data

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• 3 Pin configuration

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  • Figure 3. Pin connections (top through view)

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  • Table 6. Pin description

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• 4 Electrical characteristics

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  • Table 7. Electrical characteristics

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• 5 Typical performance characteristics

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  • Figure 4. VFB vs. temperature

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  • Figure 5. Maximum VSENSE vs. temperature

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  • Figure 6. IOUT vs. temperature FB = 0.5 V

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  • Figure 7. IOUT vs. temperature FB = GND

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  • Figure 8. Efficiency vs. input voltage 2 LEDs

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  • Figure 9. Efficiency vs. input voltage 4 LEDs

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  • Figure 10. Startup timing and dimming ILED vs. time, 2 LEDs

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  • Figure 11. Dimming EN/PWM = 200 Hz, 2 LEDs

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  • Figure 12. Startup timing and dimming ILED vs. time, 4 LEDs

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  • Figure 13. Dimming EN/PWM = 200 Hz, 4 LEDs

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  • Figure 14. VCC = 1.5 V; ILED = 200 mA, 2LEDs

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  • Figure 15. VCC = 3.6 V; ILED = 300 mA, 4LEDs

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• 6 Block diagram

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  • Figure 16. Block diagram

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• 7 Detailed description

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  • 7.1 Main control loop

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  • 7.2 Start up

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    • Figure 17. Timing diagram

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  • 7.3 Over voltage protection (OVP)

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  • 7.4 Enable/PWM

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  • 7.5 Dimming

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• 8 Application information

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  • 8.1 LED current programming

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  • 8.2 Duty cycle

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  • 8.3 Inductor selection

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    • Figure 18. Timing diagram

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  • 8.4 Inductor peak current limit

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  • 8.5 Power MOSFET selection

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    • Figure 19. Current diagram ON state

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    • Figure 20. Current diagram OFF state

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  • 8.6 Schottky diode selection

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  • 8.7 Input capacitor

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  • 8.8 Output capacitor

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• 9 Demonstration board

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  • Figure 21. Electrical schematic

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  • Table 8. Bill of material optimized for 2 LEDs and ILED = 200 mA

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• 10 Layout suggestion

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  • Figure 22. Assembly layer

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  • Figure 23. Top layer

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  • Figure 24. Bottom layer

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• 11 Package mechanical data

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• 12 Revision history

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  • Table 9. Document revision history

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