Renesas rl78 Manuale Utente

 

RL78/G1A 

 

CHAPTER  13   SERIAL  INTERFACE  IICA 

This register sets the operation mode of I

2

C and indicates the status of the I

2

C bus. 

The IICF0 register can be set by a 1-bit or 8-bit memory manipulation instruction.  However, the STT0 clear flag (STCF) 

and I

2

C bus status flag (IICBSY) bits are read-only. 

The IICRSV bit can be used to enable/disable the communication reservation function. 

The STCEN bit can be used to set the initial value of the IICBSY bit. 

The IICRSV and STCEN bits can be written only when the operation of I

2

C is disabled (bit 7 (IICE0) of IICA control 

register 00 (IICCTL00) = 0).  When operation is enabled, the IICF0 register can be read. 

Reset signal generation clears this register to 00H. 

R01UH0305EJ0200  Rev.2.00 

 

 

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Jul 04, 2013